|
9 | 9 | #include <spirv/spirv.h> |
10 | 10 | #include <spirv/spirv_types.h> |
11 | 11 |
|
12 | | -#define __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, ADDR_SPACE, ADDR_SPACE_NV, ORDER) \ |
13 | | -switch(scope){ \ |
14 | | - case Subgroup: \ |
15 | | - case Workgroup: { \ |
16 | | - TYPE_NV res = __nvvm_atom_cta##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV((ADDR_SPACE TYPE_NV*)pointer, *(TYPE_NV*)&value, cmp); \ |
17 | | - return *(TYPE*)&res; \ |
18 | | - } \ |
19 | | - case Device: { \ |
20 | | - TYPE_NV res = __nvvm_atom##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV((ADDR_SPACE TYPE_NV*)pointer, *(TYPE_NV*)&value, cmp); \ |
21 | | - return *(TYPE*)&res; \ |
22 | | - } \ |
23 | | - case CrossDevice: \ |
24 | | - default: { \ |
25 | | - TYPE_NV res = __nvvm_atom_sys##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV((ADDR_SPACE TYPE_NV*)pointer, *(TYPE_NV*)&value, cmp); \ |
26 | | - return *(TYPE*)&res; \ |
27 | | - } \ |
28 | | -} |
| 12 | +#define __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 13 | + ADDR_SPACE, ADDR_SPACE_NV, ORDER) \ |
| 14 | + switch (scope) { \ |
| 15 | + case Subgroup: \ |
| 16 | + case Workgroup: { \ |
| 17 | + TYPE_NV res = \ |
| 18 | + __nvvm_atom_cta##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV( \ |
| 19 | + (ADDR_SPACE TYPE_NV *)pointer, *(TYPE_NV *)&value, cmp); \ |
| 20 | + return *(TYPE *)&res; \ |
| 21 | + } \ |
| 22 | + case Device: { \ |
| 23 | + TYPE_NV res = __nvvm_atom##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV( \ |
| 24 | + (ADDR_SPACE TYPE_NV *)pointer, *(TYPE_NV *)&value, cmp); \ |
| 25 | + return *(TYPE *)&res; \ |
| 26 | + } \ |
| 27 | + case CrossDevice: \ |
| 28 | + default: { \ |
| 29 | + TYPE_NV res = \ |
| 30 | + __nvvm_atom_sys##ORDER##_##OP##ADDR_SPACE_NV##TYPE_MANGLED_NV( \ |
| 31 | + (ADDR_SPACE TYPE_NV *)pointer, *(TYPE_NV *)&value, cmp); \ |
| 32 | + return *(TYPE *)&res; \ |
| 33 | + } \ |
| 34 | + } |
29 | 35 |
|
30 | | -#define __CLC_NVVM_ATOMIC_CAS_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, OP_MANGLED, ADDR_SPACE, ADDR_SPACE_MANGLED, ADDR_SPACE_NV) \ |
31 | | -_CLC_DECL TYPE _Z29__spirv_Atomic##OP_MANGLED##PU3##ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagES5_##TYPE_MANGLED##TYPE_MANGLED( \ |
32 | | - volatile ADDR_SPACE TYPE *pointer, enum Scope scope, enum MemorySemanticsMask semantics1, enum MemorySemanticsMask semantics2, \ |
33 | | - TYPE cmp, TYPE value) { \ |
34 | | - /* Semantics mask may include memory order, storage class and other info \ |
35 | | - Memory order is stored in the lowest 5 bits */ \ |
36 | | - unsigned int order = (semantics1 | semantics2) & 0x1F; \ |
37 | | - switch (order) { \ |
38 | | - case None: \ |
39 | | - __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, ADDR_SPACE, ADDR_SPACE_NV, ) \ |
40 | | - case Acquire: \ |
41 | | - __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, ADDR_SPACE, ADDR_SPACE_NV, _acquire) \ |
42 | | - case Release: \ |
43 | | - __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, ADDR_SPACE, ADDR_SPACE_NV, _release) \ |
44 | | - default: \ |
45 | | - case AcquireRelease: \ |
46 | | - __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, ADDR_SPACE, ADDR_SPACE_NV, _acq_rel) \ |
47 | | - } \ |
48 | | -} |
| 36 | +#define __CLC_NVVM_ATOMIC_CAS_IMPL( \ |
| 37 | + TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, OP_MANGLED, ADDR_SPACE, \ |
| 38 | + ADDR_SPACE_MANGLED, ADDR_SPACE_NV) \ |
| 39 | + _CLC_DECL TYPE \ |
| 40 | + _Z29__spirv_Atomic##OP_MANGLED##PU3##ADDR_SPACE_MANGLED##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagES5_##TYPE_MANGLED##TYPE_MANGLED( \ |
| 41 | + volatile ADDR_SPACE TYPE *pointer, enum Scope scope, \ |
| 42 | + enum MemorySemanticsMask semantics1, \ |
| 43 | + enum MemorySemanticsMask semantics2, TYPE cmp, TYPE value) { \ |
| 44 | + /* Semantics mask may include memory order, storage class and other info \ |
| 45 | +Memory order is stored in the lowest 5 bits */ \ |
| 46 | + unsigned int order = (semantics1 | semantics2) & 0x1F; \ |
| 47 | + switch (order) { \ |
| 48 | + case None: \ |
| 49 | + __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 50 | + ADDR_SPACE, ADDR_SPACE_NV, ) \ |
| 51 | + case Acquire: \ |
| 52 | + __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 53 | + ADDR_SPACE, ADDR_SPACE_NV, _acquire) \ |
| 54 | + case Release: \ |
| 55 | + __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 56 | + ADDR_SPACE, ADDR_SPACE_NV, _release) \ |
| 57 | + default: \ |
| 58 | + case AcquireRelease: \ |
| 59 | + __CLC_NVVM_ATOMIC_CAS_IMPL_ORDER(TYPE, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 60 | + ADDR_SPACE, ADDR_SPACE_NV, _acq_rel) \ |
| 61 | + } \ |
| 62 | + } |
49 | 63 |
|
50 | | -#define __CLC_NVVM_ATOMIC_CAS(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, OP_MANGLED) \ |
51 | | -__CLC_NVVM_ATOMIC_CAS_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, OP_MANGLED, __global, AS1, _global_) \ |
52 | | -__CLC_NVVM_ATOMIC_CAS_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, OP_MANGLED, __local, AS3, _shared_) |
| 64 | +#define __CLC_NVVM_ATOMIC_CAS(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, \ |
| 65 | + OP, OP_MANGLED) \ |
| 66 | + __CLC_NVVM_ATOMIC_CAS_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 67 | + OP_MANGLED, __global, AS1, _global_) \ |
| 68 | + __CLC_NVVM_ATOMIC_CAS_IMPL(TYPE, TYPE_MANGLED, TYPE_NV, TYPE_MANGLED_NV, OP, \ |
| 69 | + OP_MANGLED, __local, AS3, _shared_) |
53 | 70 |
|
54 | 71 | __CLC_NVVM_ATOMIC_CAS(int, i, int, i, cas, CompareExchange) |
55 | 72 | __CLC_NVVM_ATOMIC_CAS(long, l, long, l, cas, CompareExchange) |
|
0 commit comments