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pigpio.c
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pigpio.c
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/*
This is free and unencumbered software released into the public domain.
Anyone is free to copy, modify, publish, use, compile, sell, or
distribute this software, either in source code form or as a compiled
binary, for any purpose, commercial or non-commercial, and by any
means.
In jurisdictions that recognize copyright laws, the author or authors
of this software dedicate any and all copyright interest in the
software to the public domain. We make this dedication for the benefit
of the public at large and to the detriment of our heirs and
successors. We intend this dedication to be an overt act of
relinquishment in perpetuity of all present and future rights to this
software under copyright law.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org/>
*/
/* pigpio version 79 */
/* include ------------------------------------------------------- */
#define _GNU_SOURCE
#include <stdio.h>
#include <string.h>
#include <strings.h>
#include <stdlib.h>
#include <stdint.h>
#include <inttypes.h>
#include <stdarg.h>
#include <ctype.h>
#include <syslog.h>
#include <poll.h>
#include <unistd.h>
#include <fcntl.h>
#include <termios.h>
#include <signal.h>
#include <errno.h>
#include <time.h>
#include <sys/ioctl.h>
#include <limits.h>
#include <pthread.h>
#include <sys/time.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/file.h>
#include <sys/socket.h>
#include <sys/sysmacros.h>
#include <netinet/tcp.h>
#include <arpa/inet.h>
#include <sys/select.h>
#include <fnmatch.h>
#include <glob.h>
#include <arpa/inet.h>
#include "pigpio.h"
#include "command.h"
/* --------------------------------------------------------------- */
/*
0 GPFSEL0 GPIO Function Select 0
1 GPFSEL1 GPIO Function Select 1
2 GPFSEL2 GPIO Function Select 2
3 GPFSEL3 GPIO Function Select 3
4 GPFSEL4 GPIO Function Select 4
5 GPFSEL5 GPIO Function Select 5
6 - Reserved
7 GPSET0 GPIO Pin Output Set 0
8 GPSET1 GPIO Pin Output Set 1
9 - Reserved
10 GPCLR0 GPIO Pin Output Clear 0
11 GPCLR1 GPIO Pin Output Clear 1
12 - Reserved
13 GPLEV0 GPIO Pin Level 0
14 GPLEV1 GPIO Pin Level 1
15 - Reserved
16 GPEDS0 GPIO Pin Event Detect Status 0
17 GPEDS1 GPIO Pin Event Detect Status 1
18 - Reserved
19 GPREN0 GPIO Pin Rising Edge Detect Enable 0
20 GPREN1 GPIO Pin Rising Edge Detect Enable 1
21 - Reserved
22 GPFEN0 GPIO Pin Falling Edge Detect Enable 0
23 GPFEN1 GPIO Pin Falling Edge Detect Enable 1
24 - Reserved
25 GPHEN0 GPIO Pin High Detect Enable 0
26 GPHEN1 GPIO Pin High Detect Enable 1
27 - Reserved
28 GPLEN0 GPIO Pin Low Detect Enable 0
29 GPLEN1 GPIO Pin Low Detect Enable 1
30 - Reserved
31 GPAREN0 GPIO Pin Async. Rising Edge Detect 0
32 GPAREN1 GPIO Pin Async. Rising Edge Detect 1
33 - Reserved
34 GPAFEN0 GPIO Pin Async. Falling Edge Detect 0
35 GPAFEN1 GPIO Pin Async. Falling Edge Detect 1
36 - Reserved
37 GPPUD GPIO Pin Pull-up/down Enable
38 GPPUDCLK0 GPIO Pin Pull-up/down Enable Clock 0
39 GPPUDCLK1 GPIO Pin Pull-up/down Enable Clock 1
40 - Reserved
41 - Test
42-56 Reserved
57 GPPUPPDN1 Pin pull-up/down for pins 15:0
58 GPPUPPDN1 Pin pull-up/down for pins 31:16
59 GPPUPPDN2 Pin pull-up/down for pins 47:32
60 GPPUPPDN3 Pin pull-up/down for pins 57:48
*/
/*
0 CS DMA Channel 0 Control and Status
1 CPI_ONBLK_AD DMA Channel 0 Control Block Address
2 TI DMA Channel 0 CB Word 0 (Transfer Information)
3 SOURCE_AD DMA Channel 0 CB Word 1 (Source Address)
4 DEST_AD DMA Channel 0 CB Word 2 (Destination Address)
5 TXFR_LEN DMA Channel 0 CB Word 3 (Transfer Length)
6 STRIDE DMA Channel 0 CB Word 4 (2D Stride)
7 NEXTCPI_ONBK DMA Channel 0 CB Word 5 (Next CB Address)
8 DEBUG DMA Channel 0 Debug
*/
/*
DEBUG register bits
bit 2 READ_ERROR
Slave Read Response Error RW 0x0
Set if the read operation returned an error value on
the read response bus. It can be cleared by writing
a 1.
bit 1 FIFO_ERROR
Fifo Error RW 0x0
Set if the optional read Fifo records an error
condition. It can be cleared by writing a 1.
bit 0 READ_LAST_NOT_SET_ERROR
Read Last Not Set Error RW 0x0
If the AXI read last signal was not set when
expected, then this error bit will be set. It can be
cleared by writing a 1.
*/
/*
0 CTL PWM Control
1 STA PWM Status
2 DMAC PWM DMA Configuration
4 RNG1 PWM Channel 1 Range
5 DAT1 PWM Channel 1 Data
6 FIF1 PWM FIFO Input
8 RNG2 PWM Channel 2 Range
9 DAT2 PWM Channel 2 Data
*/
/*
0 PCM_CS PCM Control and Status
1 PCM_FIFO PCM FIFO Data
2 PCM_MODE PCM Mode
3 PCM_RXC PCM Receive Configuration
4 PCM_TXC PCM Transmit Configuration
5 PCM_DREQ PCM DMA Request Level
6 PCM_INTEN PCM Interrupt Enables
7 PCM_INTSTC PCM Interrupt Status & Clear
8 PCM_GRAY PCM Gray Mode Control
*/
/*
0 CS System Timer Control/Status
1 CLO System Timer Counter Lower 32 bits
2 CHI System Timer Counter Higher 32 bits
3 C0 System Timer Compare 0
4 C1 System Timer Compare 1
5 C2 System Timer Compare 2
6 C3 System Timer Compare 3
*/
/* define -------------------------------------------------------- */
#define THOUSAND 1000
#define MILLION 1000000
#define BILLION 1000000000
#define BANK (gpio>>5)
#define BIT (1<<(gpio&0x1F))
#ifndef EMBEDDED_IN_VM
#define DBG(level, format, arg...) DO_DBG(level, format, ## arg)
#else
#define DBG(level, format, arg...)
#endif
#define DO_DBG(level, format, arg...) \
{ \
if ((gpioCfg.dbgLevel >= level) && \
(!(gpioCfg.internals & PI_CFG_NOSIGHANDLER))) \
fprintf(stderr, "%s %s: " format "\n" , \
myTimeStamp(), __FUNCTION__ , ## arg); \
}
#ifndef DISABLE_SER_CHECK_INITED
#define SER_CHECK_INITED CHECK_INITED
#else
#define SER_CHECK_INITED
#endif
#define CHECK_INITED \
do \
{ \
if (!libInitialised) \
{ \
DBG(DBG_ALWAYS, \
"pigpio uninitialised, call gpioInitialise()"); \
return PI_NOT_INITIALISED; \
} \
} \
while (0)
#define CHECK_INITED_RET_NULL_PTR \
do \
{ \
if (!libInitialised) \
{ \
DBG(DBG_ALWAYS, \
"pigpio uninitialised, call gpioInitialise()"); \
return (NULL); \
} \
} \
while (0)
#define CHECK_INITED_RET_NIL \
do \
{ \
if (!libInitialised) \
{ \
DBG(DBG_ALWAYS, \
"pigpio uninitialised, call gpioInitialise()"); \
} \
} \
while (0)
#define CHECK_NOT_INITED \
do \
{ \
if (libInitialised) \
{ \
DBG(DBG_ALWAYS, \
"pigpio initialised, call gpioTerminate()"); \
return PI_INITIALISED; \
} \
} \
while (0)
#define SOFT_ERROR(x, format, arg...) \
do \
{ \
DBG(DBG_ALWAYS, format, ## arg); \
return x; \
} \
while (0)
#define TIMER_ADD(a, b, result) \
do \
{ \
(result)->tv_sec = (a)->tv_sec + (b)->tv_sec; \
(result)->tv_nsec = (a)->tv_nsec + (b)->tv_nsec; \
if ((result)->tv_nsec >= BILLION) \
{ \
++(result)->tv_sec; \
(result)->tv_nsec -= BILLION; \
} \
} \
while (0)
#define TIMER_SUB(a, b, result) \
do \
{ \
(result)->tv_sec = (a)->tv_sec - (b)->tv_sec; \
(result)->tv_nsec = (a)->tv_nsec - (b)->tv_nsec; \
if ((result)->tv_nsec < 0) \
{ \
--(result)->tv_sec; \
(result)->tv_nsec += BILLION; \
} \
} \
while (0)
#define PI_PERI_BUS 0x7E000000
#define AUX_BASE (pi_peri_phys + 0x00215000)
#define BSCS_BASE (pi_peri_phys + 0x00214000)
#define CLK_BASE (pi_peri_phys + 0x00101000)
#define DMA_BASE (pi_peri_phys + 0x00007000)
#define DMA15_BASE (pi_peri_phys + 0x00E05000)
#define GPIO_BASE (pi_peri_phys + 0x00200000)
#define PADS_BASE (pi_peri_phys + 0x00100000)
#define PCM_BASE (pi_peri_phys + 0x00203000)
#define PWM_BASE (pi_peri_phys + 0x0020C000)
#define SPI_BASE (pi_peri_phys + 0x00204000)
#define SYST_BASE (pi_peri_phys + 0x00003000)
#define AUX_LEN 0xD8
#define BSCS_LEN 0x40
#define CLK_LEN 0xA8
#define DMA_LEN 0x1000 /* allow access to all channels */
#define GPIO_LEN 0xF4 /* 2711 has more registers */
#define PADS_LEN 0x38
#define PCM_LEN 0x24
#define PWM_LEN 0x28
#define SPI_LEN 0x18
#define SYST_LEN 0x1C
#define DMA_ENABLE (0xFF0/4)
#define GPFSEL0 0
#define GPSET0 7
#define GPSET1 8
#define GPCLR0 10
#define GPCLR1 11
#define GPLEV0 13
#define GPLEV1 14
#define GPEDS0 16
#define GPEDS1 17
#define GPREN0 19
#define GPREN1 20
#define GPFEN0 22
#define GPFEN1 23
#define GPHEN0 25
#define GPHEN1 26
#define GPLEN0 28
#define GPLEN1 29
#define GPAREN0 31
#define GPAREN1 32
#define GPAFEN0 34
#define GPAFEN1 35
#define GPPUD 37
#define GPPUDCLK0 38
#define GPPUDCLK1 39
/* BCM2711 has different pulls */
#define GPPUPPDN0 57
#define GPPUPPDN1 58
#define GPPUPPDN2 59
#define GPPUPPDN3 60
#define DMA_CS 0
#define DMA_CONBLK_AD 1
#define DMA_DEBUG 8
/* DMA CS Control and Status bits */
#define DMA_CHANNEL_RESET (1<<31)
#define DMA_CHANNEL_ABORT (1<<30)
#define DMA_WAIT_ON_WRITES (1<<28)
#define DMA_PANIC_PRIORITY(x) ((x)<<20)
#define DMA_PRIORITY(x) ((x)<<16)
#define DMA_INTERRUPT_STATUS (1<< 2)
#define DMA_END_FLAG (1<< 1)
#define DMA_ACTIVE (1<< 0)
/* DMA control block "info" field bits */
#define DMA_NO_WIDE_BURSTS (1<<26)
#define DMA_PERIPHERAL_MAPPING(x) ((x)<<16)
#define DMA_BURST_LENGTH(x) ((x)<<12)
#define DMA_SRC_IGNORE (1<<11)
#define DMA_SRC_DREQ (1<<10)
#define DMA_SRC_WIDTH (1<< 9)
#define DMA_SRC_INC (1<< 8)
#define DMA_DEST_IGNORE (1<< 7)
#define DMA_DEST_DREQ (1<< 6)
#define DMA_DEST_WIDTH (1<< 5)
#define DMA_DEST_INC (1<< 4)
#define DMA_WAIT_RESP (1<< 3)
#define DMA_TDMODE (1<< 1)
#define DMA_DEBUG_READ_ERR (1<<2)
#define DMA_DEBUG_FIFO_ERR (1<<1)
#define DMA_DEBUG_RD_LST_NOT_SET_ERR (1<<0)
#define DMA_LITE_FIRST 7
#define DMA_LITE_MAX 0xfffc
#define PWM_CTL 0
#define PWM_STA 1
#define PWM_DMAC 2
#define PWM_RNG1 4
#define PWM_DAT1 5
#define PWM_FIFO 6
#define PWM_RNG2 8
#define PWM_DAT2 9
#define PWM_CTL_MSEN2 (1<<15)
#define PWM_CTL_PWEN2 (1<<8)
#define PWM_CTL_MSEN1 (1<<7)
#define PWM_CTL_CLRF1 (1<<6)
#define PWM_CTL_USEF1 (1<<5)
#define PWM_CTL_MODE1 (1<<1)
#define PWM_CTL_PWEN1 (1<<0)
#define PWM_DMAC_ENAB (1 <<31)
#define PWM_DMAC_PANIC(x) ((x)<< 8)
#define PWM_DMAC_DREQ(x) (x)
#define PCM_CS 0
#define PCM_FIFO 1
#define PCM_MODE 2
#define PCM_RXC 3
#define PCM_TXC 4
#define PCM_DREQ 5
#define PCM_INTEN 6
#define PCM_INTSTC 7
#define PCM_GRAY 8
#define PCM_CS_STBY (1 <<25)
#define PCM_CS_SYNC (1 <<24)
#define PCM_CS_RXSEX (1 <<23)
#define PCM_CS_RXERR (1 <<16)
#define PCM_CS_TXERR (1 <<15)
#define PCM_CS_DMAEN (1 <<9)
#define PCM_CS_RXTHR(x) ((x)<<7)
#define PCM_CS_TXTHR(x) ((x)<<5)
#define PCM_CS_RXCLR (1 <<4)
#define PCM_CS_TXCLR (1 <<3)
#define PCM_CS_TXON (1 <<2)
#define PCM_CS_RXON (1 <<1)
#define PCM_CS_EN (1 <<0)
#define PCM_MODE_CLK_DIS (1 <<28)
#define PCM_MODE_PDMN (1 <<27)
#define PCM_MODE_PDME (1 <<26)
#define PCM_MODE_FRXP (1 <<25)
#define PCM_MODE_FTXP (1 <<24)
#define PCM_MODE_CLKM (1 <<23)
#define PCM_MODE_CLKI (1 <<22)
#define PCM_MODE_FSM (1 <<21)
#define PCM_MODE_FSI (1 <<20)
#define PCM_MODE_FLEN(x) ((x)<<10)
#define PCM_MODE_FSLEN(x) ((x)<< 0)
#define PCM_RXC_CH1WEX (1 <<31)
#define PCM_RXC_CH1EN (1 <<30)
#define PCM_RXC_CH1POS(x) ((x)<<20)
#define PCM_RXC_CH1WID(x) ((x)<<16)
#define PCM_RXC_CH2WEX (1 <<15)
#define PCM_RXC_CH2EN (1 <<14)
#define PCM_RXC_CH2POS(x) ((x)<< 4)
#define PCM_RXC_CH2WID(x) ((x)<< 0)
#define PCM_TXC_CH1WEX (1 <<31)
#define PCM_TXC_CH1EN (1 <<30)
#define PCM_TXC_CH1POS(x) ((x)<<20)
#define PCM_TXC_CH1WID(x) ((x)<<16)
#define PCM_TXC_CH2WEX (1 <<15)
#define PCM_TXC_CH2EN (1 <<14)
#define PCM_TXC_CH2POS(x) ((x)<< 4)
#define PCM_TXC_CH2WID(x) ((x)<< 0)
#define PCM_DREQ_TX_PANIC(x) ((x)<<24)
#define PCM_DREQ_RX_PANIC(x) ((x)<<16)
#define PCM_DREQ_TX_REQ_L(x) ((x)<< 8)
#define PCM_DREQ_RX_REQ_L(x) ((x)<< 0)
#define PCM_INTEN_RXERR (1<<3)
#define PCM_INTEN_TXERR (1<<2)
#define PCM_INTEN_RXR (1<<1)
#define PCM_INTEN_TXW (1<<0)
#define PCM_INTSTC_RXERR (1<<3)
#define PCM_INTSTC_TXERR (1<<2)
#define PCM_INTSTC_RXR (1<<1)
#define PCM_INTSTC_TXW (1<<0)
#define PCM_GRAY_FLUSH (1<<2)
#define PCM_GRAY_CLR (1<<1)
#define PCM_GRAY_EN (1<<0)
#define BCM_PASSWD (0x5A<<24)
#define CLK_CTL_MASH(x)((x)<<9)
#define CLK_CTL_BUSY (1 <<7)
#define CLK_CTL_KILL (1 <<5)
#define CLK_CTL_ENAB (1 <<4)
#define CLK_CTL_SRC(x) ((x)<<0)
#define CLK_SRCS 2
#define CLK_CTL_SRC_OSC 1
#define CLK_CTL_SRC_PLLD 6
#define CLK_OSC_FREQ 19200000
#define CLK_OSC_FREQ_2711 54000000
#define CLK_PLLD_FREQ 500000000
#define CLK_PLLD_FREQ_2711 750000000
#define CLK_DIV_DIVI(x) ((x)<<12)
#define CLK_DIV_DIVF(x) ((x)<< 0)
#define CLK_GP0_CTL 28
#define CLK_GP0_DIV 29
#define CLK_GP1_CTL 30
#define CLK_GP1_DIV 31
#define CLK_GP2_CTL 32
#define CLK_GP2_DIV 33
#define CLK_PCMCTL 38
#define CLK_PCMDIV 39
#define CLK_PWMCTL 40
#define CLK_PWMDIV 41
#define SYST_CS 0
#define SYST_CLO 1
#define SYST_CHI 2
/* SPI */
#define SPI_CS 0
#define SPI_FIFO 1
#define SPI_CLK 2
#define SPI_DLEN 3
#define SPI_LTOH 4
#define SPI_DC 5
#define SPI_CS_LEN_LONG (1<<25)
#define SPI_CS_DMA_LEN (1<<24)
#define SPI_CS_CSPOLS(x) ((x)<<21)
#define SPI_CS_RXF (1<<20)
#define SPI_CS_RXR (1<<19)
#define SPI_CS_TXD (1<<18)
#define SPI_CS_RXD (1<<17)
#define SPI_CS_DONE (1<<16)
#define SPI_CS_LEN (1<<13)
#define SPI_CS_REN (1<<12)
#define SPI_CS_ADCS (1<<11)
#define SPI_CS_INTR (1<<10)
#define SPI_CS_INTD (1<<9)
#define SPI_CS_DMAEN (1<<8)
#define SPI_CS_TA (1<<7)
#define SPI_CS_CSPOL(x) ((x)<<6)
#define SPI_CS_CLEAR(x) ((x)<<4)
#define SPI_CS_MODE(x) ((x)<<2)
#define SPI_CS_CS(x) ((x)<<0)
#define SPI_DC_RPANIC(x) ((x)<<24)
#define SPI_DC_RDREQ(x) ((x)<<16)
#define SPI_DC_TPANIC(x) ((x)<<8)
#define SPI_DC_TDREQ(x) ((x)<<0)
#define SPI_MODE0 0
#define SPI_MODE1 1
#define SPI_MODE2 2
#define SPI_MODE3 3
#define SPI_CS0 0
#define SPI_CS1 1
#define SPI_CS2 2
/* standard SPI gpios (ALT0) */
#define PI_SPI_CE0 8
#define PI_SPI_CE1 7
#define PI_SPI_SCLK 11
#define PI_SPI_MISO 9
#define PI_SPI_MOSI 10
/* auxiliary SPI gpios (ALT4) */
#define PI_ASPI_CE0 18
#define PI_ASPI_CE1 17
#define PI_ASPI_CE2 16
#define PI_ASPI_MISO 19
#define PI_ASPI_MOSI 20
#define PI_ASPI_SCLK 21
/* AUX */
#define AUX_IRQ 0
#define AUX_ENABLES 1
#define AUX_MU_IO_REG 16
#define AUX_MU_IER_REG 17
#define AUX_MU_IIR_REG 18
#define AUX_MU_LCR_REG 19
#define AUX_MU_MCR_REG 20
#define AUX_MU_LSR_REG 21
#define AUX_MU_MSR_REG 22
#define AUX_MU_SCRATCH 23
#define AUX_MU_CNTL_REG 24
#define AUX_MU_STAT_REG 25
#define AUX_MU_BAUD_REG 26
#define AUX_SPI0_CNTL0_REG 32
#define AUX_SPI0_CNTL1_REG 33
#define AUX_SPI0_STAT_REG 34
#define AUX_SPI0_PEEK_REG 35
#define AUX_SPI0_IO_REG 40
#define AUX_SPI0_TX_HOLD 44
#define AUX_SPI1_CNTL0_REG 48
#define AUX_SPI1_CNTL1_REG 49
#define AUX_SPI1_STAT_REG 50
#define AUX_SPI1_PEEK_REG 51
#define AUX_SPI1_IO_REG 56
#define AUX_SPI1_TX_HOLD 60
#define AUXENB_SPI2 (1<<2)
#define AUXENB_SPI1 (1<<1)
#define AUXENB_UART (1<<0)
#define AUXSPI_CNTL0_SPEED(x) ((x)<<20)
#define AUXSPI_CNTL0_CS(x) ((x)<<17)
#define AUXSPI_CNTL0_POSTINP (1<<16)
#define AUXSPI_CNTL0_VAR_CS (1<<15)
#define AUXSPI_CNTL0_VAR_WIDTH (1<<14)
#define AUXSPI_CNTL0_DOUT_HOLD(x) ((x)<<12)
#define AUXSPI_CNTL0_ENABLE (1<<11)
#define AUXSPI_CNTL0_IN_RISING(x) ((x)<<10)
#define AUXSPI_CNTL0_CLR_FIFOS (1<<9)
#define AUXSPI_CNTL0_OUT_RISING(x) ((x)<<8)
#define AUXSPI_CNTL0_INVERT_CLK(x) ((x)<<7)
#define AUXSPI_CNTL0_MSB_FIRST(x) ((x)<<6)
#define AUXSPI_CNTL0_SHIFT_LEN(x) ((x)<<0)
#define AUXSPI_CNTL1_CS_HIGH(x) ((x)<<8)
#define AUXSPI_CNTL1_TX_IRQ (1<<7)
#define AUXSPI_CNTL1_DONE_IRQ (1<<6)
#define AUXSPI_CNTL1_MSB_FIRST(x)((x)<<1)
#define AUXSPI_CNTL1_KEEP_INPUT (1<<0)
#define AUXSPI_STAT_TX_FIFO(x) ((x)<<28)
#define AUXSPI_STAT_RX_FIFO(x) ((x)<<20)
#define AUXSPI_STAT_TX_FULL (1<<10)
#define AUXSPI_STAT_TX_EMPTY (1<<9)
#define AUXSPI_STAT_RX_EMPTY (1<<7)
#define AUXSPI_STAT_BUSY (1<<6)
#define AUXSPI_STAT_BITS(x) ((x)<<0)
/* --------------------------------------------------------------- */
#define NORMAL_DMA (DMA_NO_WIDE_BURSTS | DMA_WAIT_RESP)
#define TWO_BEAT_DMA (DMA_TDMODE | DMA_BURST_LENGTH(1))
#define TIMED_DMA(x) (DMA_DEST_DREQ | DMA_PERIPHERAL_MAPPING(x))
#define PCM_TIMER (((PCM_BASE + PCM_FIFO*4) & 0x00ffffff) | PI_PERI_BUS)
#define PWM_TIMER (((PWM_BASE + PWM_FIFO*4) & 0x00ffffff) | PI_PERI_BUS)
#define DBG_MIN_LEVEL 0
#define DBG_ALWAYS 0
#define DBG_STARTUP 1
#define DBG_DMACBS 2
#define DBG_SCRIPT 3
#define DBG_USER 4
#define DBG_INTERNAL 5
#define DBG_SLOW_TICK 6
#define DBG_FAST_TICK 7
#define DBG_MAX_LEVEL 8
#define GPIO_UNDEFINED 0
#define GPIO_WRITE 1
#define GPIO_PWM 2
#define GPIO_SERVO 3
#define GPIO_HW_CLK 4
#define GPIO_HW_PWM 5
#define GPIO_SPI 6
#define GPIO_I2C 7
#define STACK_SIZE (256*1024)
#define PAGE_SIZE 4096
#define PWM_FREQS 18
#define CYCLES_PER_BLOCK 80
#define PULSE_PER_CYCLE 25
#define PAGES_PER_BLOCK 53
#define CBS_PER_IPAGE 117
#define LVS_PER_IPAGE 38
#define OFF_PER_IPAGE 38
#define TCK_PER_IPAGE 2
#define ON_PER_IPAGE 2
#define PAD_PER_IPAGE 7
#define CBS_PER_OPAGE 118
#define OOL_PER_OPAGE 79
/*
Wave Count Block
Assumes two counters per block. Each counter 4 * 16 (16^4=65536)
0 CB [13] 13*8 104 CBs for counter 0
104 CB [13] 13*8 104 CBs for counter 1
208 CB [60] 60*8 480 CBs reserved to construct wave
688 OOL [60] 60*1 60 OOL reserved to construct wave
748 OOL[136] 136*1 136 OOL for counter 0
884 OOL[136] 136*1 136 OOL for counter 1
1020 pad [4] 4*1 4 spare
*/
#define WCB_CNT_PER_PAGE 2
#define WCB_COUNTERS (WCB_CNT_PER_PAGE * PI_WAVE_COUNT_PAGES)
#define WCB_CNT_CBS 13
#define WCB_CNT_OOL 68
#define WCB_COUNTER_OOL (WCB_CNT_PER_PAGE * WCB_CNT_OOL)
#define WCB_COUNTER_CBS (WCB_CNT_PER_PAGE * WCB_CNT_CBS)
#define WCB_CHAIN_CBS 60
#define WCB_CHAIN_OOL 60
#define CBS_PER_CYCLE ((PULSE_PER_CYCLE*3)+2)
#define NUM_CBS (CBS_PER_CYCLE * bufferCycles)
#define SUPERCYCLE 800
#define SUPERLEVEL 20000
#define BLOCK_SIZE (PAGES_PER_BLOCK*PAGE_SIZE)
#define DMAI_PAGES (PAGES_PER_BLOCK * bufferBlocks)
#define DMAO_PAGES (PAGES_PER_BLOCK * PI_WAVE_BLOCKS)
#define NUM_WAVE_OOL (DMAO_PAGES * OOL_PER_OPAGE)
#define NUM_WAVE_CBS (DMAO_PAGES * CBS_PER_OPAGE)
#define TICKSLOTS 50
#define PI_I2C_CLOSED 0
#define PI_I2C_RESERVED 1
#define PI_I2C_OPENED 2
#define PI_SPI_CLOSED 0
#define PI_SPI_RESERVED 1
#define PI_SPI_OPENED 2
#define PI_SER_CLOSED 0
#define PI_SER_RESERVED 1
#define PI_SER_OPENED 2
#define PI_FILE_CLOSED 0
#define PI_FILE_RESERVED 1
#define PI_FILE_OPENED 2
#define PI_NOTIFY_CLOSED 0
#define PI_NOTIFY_RESERVED 1
#define PI_NOTIFY_CLOSING 2
#define PI_NOTIFY_OPENED 3
#define PI_NOTIFY_RUNNING 4
#define PI_NOTIFY_PAUSED 5
#define PI_WFRX_NONE 0
#define PI_WFRX_SERIAL 1
#define PI_WFRX_I2C_SDA 2
#define PI_WFRX_I2C_SCL 3
#define PI_WFRX_SPI_SCLK 4
#define PI_WFRX_SPI_MISO 5
#define PI_WFRX_SPI_MOSI 6
#define PI_WFRX_SPI_CS 7
#define PI_WF_MICROS 1
#define BPD 4
#define MAX_REPORT 250
#define MAX_SAMPLE 4000
#define DEFAULT_PWM_IDX 5
#define MAX_EMITS (PIPE_BUF / sizeof(gpioReport_t))
#define SRX_BUF_SIZE 8192
#define PI_I2C_RETRIES 0x0701
#define PI_I2C_TIMEOUT 0x0702
#define PI_I2C_SLAVE 0x0703
#define PI_I2C_FUNCS 0x0705
#define PI_I2C_RDWR 0x0707
#define PI_I2C_SMBUS 0x0720
#define PI_I2C_SMBUS_READ 1
#define PI_I2C_SMBUS_WRITE 0
#define PI_I2C_SMBUS_QUICK 0
#define PI_I2C_SMBUS_BYTE 1
#define PI_I2C_SMBUS_BYTE_DATA 2
#define PI_I2C_SMBUS_WORD_DATA 3
#define PI_I2C_SMBUS_PROC_CALL 4
#define PI_I2C_SMBUS_BLOCK_DATA 5
#define PI_I2C_SMBUS_I2C_BLOCK_BROKEN 6
#define PI_I2C_SMBUS_BLOCK_PROC_CALL 7
#define PI_I2C_SMBUS_I2C_BLOCK_DATA 8
#define PI_I2C_SMBUS_BLOCK_MAX 32
#define PI_I2C_SMBUS_I2C_BLOCK_MAX 32
#define PI_I2C_FUNC_SMBUS_QUICK 0x00010000
#define PI_I2C_FUNC_SMBUS_READ_BYTE 0x00020000
#define PI_I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
#define PI_I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
#define PI_I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
#define PI_I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
#define PI_I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
#define PI_I2C_FUNC_SMBUS_PROC_CALL 0x00800000
#define PI_I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
#define PI_I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
#define PI_I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000
#define PI_I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000
#define PI_MASH_MAX_FREQ 23800000
#define FLUSH_PAGES 1024
#define MB_DEV_MAJOR 100
#define MB_IOCTL _IOWR(MB_DEV_MAJOR, 0, char *)
#define MB_DEV1 "/dev/vcio"
#define MB_DEV2 "/dev/pigpio-mb"
#define BUS_TO_PHYS(x) ((x)&~0xC0000000)
#define MB_END_TAG 0
#define MB_PROCESS_REQUEST 0
#define MB_ALLOCATE_MEMORY_TAG 0x3000C
#define MB_LOCK_MEMORY_TAG 0x3000D
#define MB_UNLOCK_MEMORY_TAG 0x3000E
#define MB_RELEASE_MEMORY_TAG 0x3000F
#define PI_SCRIPT_FREE 0
#define PI_SCRIPT_RESERVED 1
#define PI_SCRIPT_IN_USE 2
#define PI_SCRIPT_DYING 3
#define PI_SCRIPT_HALT 0
#define PI_SCRIPT_RUN 1
#define PI_SCRIPT_DELETE 2
#define PI_SCRIPT_STACK_SIZE 256
#define PI_SPI_FLAGS_CHANNEL(x) ((x&7)<<29)
#define PI_SPI_FLAGS_GET_CHANNEL(x) (((x)>>29)&7)
#define PI_SPI_FLAGS_GET_BITLEN(x) (((x)>>16)&63)
#define PI_SPI_FLAGS_GET_RX_LSB(x) (((x)>>15)&1)
#define PI_SPI_FLAGS_GET_TX_LSB(x) (((x)>>14)&1)
#define PI_SPI_FLAGS_GET_3WREN(x) (((x)>>10)&15)
#define PI_SPI_FLAGS_GET_3WIRE(x) (((x)>>9)&1)
#define PI_SPI_FLAGS_GET_AUX_SPI(x) (((x)>>8)&1)
#define PI_SPI_FLAGS_GET_RESVD(x) (((x)>>5)&7)
#define PI_SPI_FLAGS_GET_CSPOLS(x) (((x)>>2)&7)
#define PI_SPI_FLAGS_GET_MODE(x) ((x)&3)
#define PI_SPI_FLAGS_GET_CPHA(x) ((x)&1)
#define PI_SPI_FLAGS_GET_CPOL(x) ((x)&2)
#define PI_SPI_FLAGS_GET_CSPOL(x) ((x)&4)
#define PI_STARTING 0
#define PI_RUNNING 1
#define PI_ENDING 2
#define PI_THREAD_NONE 0
#define PI_THREAD_STARTED 1
#define PI_THREAD_RUNNING 2
#define PI_MAX_PATH 512
/* typedef ------------------------------------------------------- */
typedef void (*callbk_t) ();
typedef struct
{
rawCbs_t cb [128];
} dmaPage_t;
typedef struct
{
rawCbs_t cb [CBS_PER_IPAGE];
uint32_t level [LVS_PER_IPAGE];
uint32_t gpioOff [OFF_PER_IPAGE];
uint32_t tick [TCK_PER_IPAGE];
uint32_t gpioOn [ON_PER_IPAGE];
uint32_t periphData;
uint32_t pad [PAD_PER_IPAGE];
} dmaIPage_t;
typedef struct
{
rawCbs_t cb [CBS_PER_OPAGE];
uint32_t OOL [OOL_PER_OPAGE];
uint32_t periphData;
} dmaOPage_t;
typedef struct
{
uint8_t is;
uint8_t pad;
uint16_t width;
uint16_t range; /* dutycycles specified by 0 .. range */
uint16_t freqIdx;
uint16_t deferOff;
uint16_t deferRng;
} gpioInfo_t;
typedef struct
{
callbk_t func;
unsigned ex;
void *userdata;
int wdSteadyUs;
uint32_t wdTick;
uint32_t wdLBitV;
int nfSteadyUs;
int nfActiveUs;
int nfActive;
uint32_t nfTick1;
uint32_t nfTick2;
uint32_t nfLBitV;
uint32_t nfRBitV;
uint32_t gfSteadyUs;
uint8_t gfInitialised;
uint32_t gfTick;
uint32_t gfLBitV;
uint32_t gfRBitV;
} gpioAlert_t;
typedef struct
{
callbk_t func;
unsigned ex;
void *userdata;
int ignore;
int fired;
} eventAlert_t;
typedef struct
{
unsigned gpio;
pthread_t *pth;
callbk_t func;
unsigned edge;
int timeout;
unsigned ex;
void *userdata;
int fd;
int inited;
} gpioISR_t;
typedef struct
{
callbk_t func;
unsigned ex;
void *userdata;
} gpioSignal_t;
typedef struct
{
callbk_t func;
unsigned ex;
void *userdata;
uint32_t bits;
} gpioGetSamples_t;
typedef struct
{
callbk_t func;
unsigned ex;