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Srinivas Neelibrgl
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gpio: gpio-xilinx: Reduce spinlock array to array
Changed spinlock array to single. It is preparation for irq support which is shared between two channels that's why spinlock should be only one. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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drivers/gpio/gpio-xilinx.c

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ struct xgpio_instance {
4747
unsigned int gpio_width[2];
4848
u32 gpio_state[2];
4949
u32 gpio_dir[2];
50-
spinlock_t gpio_lock[2];
50+
spinlock_t gpio_lock; /* For serializing operations */
5151
struct clk *clk;
5252
};
5353

@@ -113,7 +113,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
113113
int index = xgpio_index(chip, gpio);
114114
int offset = xgpio_offset(chip, gpio);
115115

116-
spin_lock_irqsave(&chip->gpio_lock[index], flags);
116+
spin_lock_irqsave(&chip->gpio_lock, flags);
117117

118118
/* Write to GPIO signal and set its direction to output */
119119
if (val)
@@ -124,7 +124,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
124124
xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
125125
xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
126126

127-
spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
127+
spin_unlock_irqrestore(&chip->gpio_lock, flags);
128128
}
129129

130130
/**
@@ -144,7 +144,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
144144
int index = xgpio_index(chip, 0);
145145
int offset, i;
146146

147-
spin_lock_irqsave(&chip->gpio_lock[index], flags);
147+
spin_lock_irqsave(&chip->gpio_lock, flags);
148148

149149
/* Write to GPIO signals */
150150
for (i = 0; i < gc->ngpio; i++) {
@@ -155,9 +155,9 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
155155
xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
156156
index * XGPIO_CHANNEL_OFFSET,
157157
chip->gpio_state[index]);
158-
spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
158+
spin_unlock_irqrestore(&chip->gpio_lock, flags);
159159
index = xgpio_index(chip, i);
160-
spin_lock_irqsave(&chip->gpio_lock[index], flags);
160+
spin_lock_irqsave(&chip->gpio_lock, flags);
161161
}
162162
if (__test_and_clear_bit(i, mask)) {
163163
offset = xgpio_offset(chip, i);
@@ -171,7 +171,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
171171
xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
172172
index * XGPIO_CHANNEL_OFFSET, chip->gpio_state[index]);
173173

174-
spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
174+
spin_unlock_irqrestore(&chip->gpio_lock, flags);
175175
}
176176

177177
/**
@@ -190,14 +190,14 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
190190
int index = xgpio_index(chip, gpio);
191191
int offset = xgpio_offset(chip, gpio);
192192

193-
spin_lock_irqsave(&chip->gpio_lock[index], flags);
193+
spin_lock_irqsave(&chip->gpio_lock, flags);
194194

195195
/* Set the GPIO bit in shadow register and set direction as input */
196196
chip->gpio_dir[index] |= BIT(offset);
197197
xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
198198
xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
199199

200-
spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
200+
spin_unlock_irqrestore(&chip->gpio_lock, flags);
201201

202202
return 0;
203203
}
@@ -221,7 +221,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
221221
int index = xgpio_index(chip, gpio);
222222
int offset = xgpio_offset(chip, gpio);
223223

224-
spin_lock_irqsave(&chip->gpio_lock[index], flags);
224+
spin_lock_irqsave(&chip->gpio_lock, flags);
225225

226226
/* Write state of GPIO signal */
227227
if (val)
@@ -236,7 +236,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
236236
xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
237237
xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
238238

239-
spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
239+
spin_unlock_irqrestore(&chip->gpio_lock, flags);
240240

241241
return 0;
242242
}
@@ -312,7 +312,7 @@ static int xgpio_probe(struct platform_device *pdev)
312312
if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
313313
chip->gpio_width[0] = 32;
314314

315-
spin_lock_init(&chip->gpio_lock[0]);
315+
spin_lock_init(&chip->gpio_lock);
316316

317317
if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
318318
is_dual = 0;
@@ -336,7 +336,6 @@ static int xgpio_probe(struct platform_device *pdev)
336336
&chip->gpio_width[1]))
337337
chip->gpio_width[1] = 32;
338338

339-
spin_lock_init(&chip->gpio_lock[1]);
340339
}
341340

342341
chip->gc.base = -1;

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