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Pu LehuiKernel Patches Daemon
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selftests/bpf: Enable arena atomics tests for RV64
Enable arena atomics tests for RV64. Signed-off-by: Pu Lehui <pulehui@huawei.com>
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tools/testing/selftests/bpf/progs/arena_atomics.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,8 @@ bool skip_all_tests = true;
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#if defined(ENABLE_ATOMICS_TESTS) && \
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defined(__BPF_FEATURE_ADDR_SPACE_CAST) && \
31-
(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86))
31+
(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86) || \
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(defined(__TARGET_ARCH_riscv) && __riscv_xlen == 64))
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bool skip_lacq_srel_tests __attribute((__section__(".data"))) = false;
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#else
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bool skip_lacq_srel_tests = true;
@@ -314,7 +315,8 @@ int load_acquire(const void *ctx)
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{
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#if defined(ENABLE_ATOMICS_TESTS) && \
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defined(__BPF_FEATURE_ADDR_SPACE_CAST) && \
317-
(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86))
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(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86) || \
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(defined(__TARGET_ARCH_riscv) && __riscv_xlen == 64))
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#define LOAD_ACQUIRE_ARENA(SIZEOP, SIZE, SRC, DST) \
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{ asm volatile ( \
@@ -365,7 +367,8 @@ int store_release(const void *ctx)
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{
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#if defined(ENABLE_ATOMICS_TESTS) && \
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defined(__BPF_FEATURE_ADDR_SPACE_CAST) && \
368-
(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86))
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(defined(__TARGET_ARCH_arm64) || defined(__TARGET_ARCH_x86) || \
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(defined(__TARGET_ARCH_riscv) && __riscv_xlen == 64))
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#define STORE_RELEASE_ARENA(SIZEOP, DST, VAL) \
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{ asm volatile ( \

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