@@ -57,7 +57,20 @@ static llvm::cl::opt<bool, true> preserveDwarfLineSection(
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llvm::cl::init(false ));
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#endif
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- const char *getABI (const llvm::Triple &triple, const llvm::SmallVector<llvm::StringRef, 8 > &features) {
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+ // Returns true if 'feature' is enabled and false otherwise. Handles the
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+ // case where the feature is specified multiple times ('+m,-m'), and
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+ // takes the last occurrence.
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+ bool isFeatureEnabled (const llvm::SmallVectorImpl<llvm::StringRef> &features,
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+ llvm::StringRef feature) {
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+ for (auto it = features.rbegin (), end = features.rend (); it != end; ++it) {
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+ if (it->substr (1 ) == feature) {
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+ return (*it)[0 ] == ' +' ;
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+ }
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+ }
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+ return false ;
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+ };
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+
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+ const char *getABI (const llvm::Triple &triple, const llvm::SmallVectorImpl<llvm::StringRef> &features) {
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llvm::StringRef ABIName (opts::mABI );
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if (ABIName != " " ) {
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switch (triple.getArch ()) {
@@ -111,17 +124,6 @@ const char *getABI(const llvm::Triple &triple, const llvm::SmallVector<llvm::Str
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ABIName.str ().c_str ());
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}
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- // checks if the features include ±<feature>
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- auto hasFeature = [&features](llvm::StringRef feature) {
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- for (int i = features.size () - 1 ; i >= 0 ; i--) {
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- auto f = features[i];
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- if (f.substr (1 ) == feature) {
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- return f[0 ] == ' +' ;
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- }
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- }
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- return false ;
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- };
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-
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switch (triple.getArch ()) {
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case llvm::Triple::mips64:
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case llvm::Triple::mips64el:
@@ -131,9 +133,9 @@ const char *getABI(const llvm::Triple &triple, const llvm::SmallVector<llvm::Str
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case llvm::Triple::ppc64le:
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return " elfv2" ;
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case llvm::Triple::riscv64:
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- if (hasFeature ( " d" ))
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+ if (isFeatureEnabled (features, " d" ))
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return " lp64d" ;
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- if (hasFeature ( " f" ))
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+ if (isFeatureEnabled (features, " f" ))
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return " lp64f" ;
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return " lp64" ;
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case llvm::Triple::riscv32:
@@ -445,13 +447,9 @@ createTargetMachine(const std::string targetTriple, const std::string arch,
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// checks if the features include ±<feature>
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auto hasFeature = [&features](llvm::StringRef feature) {
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- for (int i = features.size () - 1 ; i >= 0 ; i--) {
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- auto f = features[i];
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- if (f.substr (1 ) == feature) {
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- return f[0 ] == ' +' ;
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- }
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- }
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- return false ;
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+ return std::any_of (
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+ features.begin (), features.end (),
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+ [feature](llvm::StringRef f) { return f.substr (1 ) == feature; });
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};
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// cmpxchg16b is not available on old 64bit CPUs. Enable code generation
@@ -462,14 +460,12 @@ createTargetMachine(const std::string targetTriple, const std::string arch,
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// For a hosted RISC-V 64-bit target default to rv64gc if nothing has
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// been selected
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- if (triple.getArch () == llvm::Triple::riscv64 &&
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- triple.getOS () != llvm::Triple::UnknownOS &&
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- features.empty ()) {
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- features.push_back (" +m" );
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- features.push_back (" +a" );
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- features.push_back (" +f" );
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- features.push_back (" +d" );
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- features.push_back (" +c" );
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+ if (triple.getArch () == llvm::Triple::riscv64 && features.empty ()) {
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+ const llvm::StringRef os = triple.getOSName ();
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+ const bool isFreeStanding = os.empty () || os == " unknown" || os == " none" ;
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+ if (!isFreeStanding) {
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+ features.insert (features.end (), {" +m" , " +a" , " +f" , " +d" , " +c" });
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+ }
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}
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// Handle cases where LLVM picks wrong default relocModel
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