Skip to content

Commit c270cac

Browse files
llandwerlin-inteljnikula
authored andcommitted
drm/i915: fix whitelist selftests with readonly registers
When a register is readonly there is not much we can tell about its value (apart from its default value?). This can be covered by tests exercising the value of the register from userspace. For PS_INVOCATION_COUNT we've got the following piglit tests : KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations Vulkan CTS tests : dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.* v2: Use a local to shrink under 80cols. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 86554f4 ("drm/i915/selftests: Verify whitelist of context registers") Tested-by: Anuj Phogat <anuj.phogat@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190629131350.31185-1-chris@chris-wilson.co.uk (cherry picked from commit 361b690) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
1 parent 7d3cd66 commit c270cac

File tree

1 file changed

+6
-1
lines changed

1 file changed

+6
-1
lines changed

drivers/gpu/drm/i915/gt/selftest_workarounds.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -925,7 +925,12 @@ check_whitelisted_registers(struct intel_engine_cs *engine,
925925

926926
err = 0;
927927
for (i = 0; i < engine->whitelist.count; i++) {
928-
if (!fn(engine, a[i], b[i], engine->whitelist.list[i].reg))
928+
const struct i915_wa *wa = &engine->whitelist.list[i];
929+
930+
if (i915_mmio_reg_offset(wa->reg) & RING_FORCE_TO_NONPRIV_RD)
931+
continue;
932+
933+
if (!fn(engine, a[i], b[i], wa->reg))
929934
err = -EINVAL;
930935
}
931936

0 commit comments

Comments
 (0)