Colorlight 75E hardware version 8.0 is not yet described

[cdwijs]

I'm the proud owner of a Colorlight 75E hardware version 8.0. The connections from the FPGA to the connectors are not yet mapped.

I would like to create gateware that shows what ball of the FPGA goes to what point on the headers.

On each pin, I would like to output a train of pulses, that indicate the ball. First a preamble, and then 2 burst indicating the row and column That way I can look at an LED to figure out the connection.

For example:
A2: 10101010101010000010000010010000 (and then repeat)
G4: 10101010101010000010010010010010010010000010010010010000
C4: 10101010101010000010010010000010010010010000

Has this already been done?
Where can I find a file that defines the balls of the FPGA package?

[cdwijs]

Here's the mapping between symbols and balls of the FPGA:

https://www.latticesemi.com/view_document?document_id=50485

[enjoy-digital]

Hi @cdwijs,

you can find here a LiteX design that I used to document one of the variant: https://github.com/enjoy-digital/colorlite/blob/master/ios_stream.py

This should allow you to create your own version for the 8.0 variant.

[rowanG077]

There is an LPF file here: https://github.com/q3k/chubby75/blob/master/5a-75b/lpf/cl-5a-75v-v80.lpf

But I didn't test it so I can't vouch for the validity. But at least it might be easiest to just copy over that first and with any luck it will work!