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[CIR][NFC] Use getType() instead of more verbose getResult().getType() (#1662)
1 parent 47fa3eb commit f077eec

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8 files changed

+35
-44
lines changed

8 files changed

+35
-44
lines changed

‎clang/include/clang/CIR/Dialect/IR/CIROps.td‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2868,11 +2868,6 @@ def GetMemberOp : CIR_Op<"get_member"> {
28682868

28692869
/// Return the record type pointed by the base pointer.
28702870
cir::PointerType getAddrTy() { return getAddr().getType(); }
2871-
2872-
/// Return the result type.
2873-
cir::PointerType getResultTy() {
2874-
return getResult().getType();
2875-
}
28762871
}];
28772872

28782873
let hasVerifier = 1;

‎clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -148,7 +148,7 @@ static RValue emitBuiltinBitOp(
148148
}
149149
const mlir::Value result = op.getResult();
150150
if (const mlir::Type resultType = CGF.convertType(E->getType());
151-
op.getResult().getType() != resultType) {
151+
op.getType() != resultType) {
152152
return RValue::get(CGF.getBuilder().createIntCast(result, resultType));
153153
}
154154
return RValue::get(result);

‎clang/lib/CIR/Dialect/IR/CIRDialect.cpp‎

Lines changed: 11 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -498,8 +498,8 @@ LogicalResult cir::AtomicCmpXchg::verify() {
498498
//===----------------------------------------------------------------------===//
499499

500500
LogicalResult cir::CastOp::verify() {
501-
auto resType = getResult().getType();
502-
auto srcType = getSrc().getType();
501+
mlir::Type resType = getType();
502+
mlir::Type srcType = getSrc().getType();
503503

504504
if (mlir::isa<cir::VectorType>(srcType) &&
505505
mlir::isa<cir::VectorType>(resType)) {
@@ -581,7 +581,7 @@ LogicalResult cir::CastOp::verify() {
581581
// This is the only cast kind where we don't want vector types to decay
582582
// into the element type.
583583
if ((!mlir::isa<cir::VectorType>(getSrc().getType()) ||
584-
!mlir::isa<cir::VectorType>(getResult().getType())))
584+
!mlir::isa<cir::VectorType>(getType())))
585585
return emitOpError()
586586
<< "requires !cir.ptr or !cir.vector type for source and result";
587587
return success();
@@ -797,7 +797,7 @@ Value tryFoldCastChain(cir::CastOp op) {
797797
}
798798

799799
OpFoldResult cir::CastOp::fold(FoldAdaptor adaptor) {
800-
if (getSrc().getType() == getResult().getType()) {
800+
if (getSrc().getType() == getType()) {
801801
switch (getKind()) {
802802
case cir::CastKind::integral: {
803803
// TODO: for sign differences, it's possible in certain conditions to
@@ -1023,7 +1023,7 @@ LogicalResult cir::VecCreateOp::verify() {
10231023
// Verify that the number of arguments matches the number of elements in the
10241024
// vector, and that the type of all the arguments matches the type of the
10251025
// elements in the vector.
1026-
auto VecTy = getResult().getType();
1026+
auto VecTy = getType();
10271027
if (getElements().size() != VecTy.getSize()) {
10281028
return emitOpError() << "operand count of " << getElements().size()
10291029
<< " doesn't match vector type " << VecTy
@@ -1065,16 +1065,15 @@ LogicalResult cir::VecTernaryOp::verify() {
10651065
LogicalResult cir::VecShuffleOp::verify() {
10661066
// The number of elements in the indices array must match the number of
10671067
// elements in the result type.
1068-
if (getIndices().size() != getResult().getType().getSize()) {
1068+
if (getIndices().size() != getType().getSize()) {
10691069
return emitOpError() << ": the number of elements in " << getIndices()
1070-
<< " and " << getResult().getType() << " don't match";
1070+
<< " and " << getType() << " don't match";
10711071
}
10721072
// The element types of the two input vectors and of the result type must
10731073
// match.
1074-
if (getVec1().getType().getElementType() !=
1075-
getResult().getType().getElementType()) {
1074+
if (getVec1().getType().getElementType() != getType().getElementType()) {
10761075
return emitOpError() << ": element types of " << getVec1().getType()
1077-
<< " and " << getResult().getType() << " don't match";
1076+
<< " and " << getType() << " don't match";
10781077
}
10791078
// The indices must all be integer constants
10801079
if (not std::all_of(
@@ -3607,7 +3606,7 @@ LogicalResult cir::GetMemberOp::verify() {
36073606
if (recordTy.getMembers().size() <= getIndex())
36083607
return emitError() << "member index out of bounds";
36093608

3610-
if (recordTy.getMembers()[getIndex()] != getResultTy().getPointee())
3609+
if (recordTy.getMembers()[getIndex()] != getType().getPointee())
36113610
return emitError() << "member type mismatch";
36123611

36133612
return mlir::success();
@@ -3949,7 +3948,7 @@ LogicalResult cir::ShiftOp::verify() {
39493948
if (op0VecTy.getSize() != op1VecTy.getSize())
39503949
return emitOpError() << "input vector types must have the same size";
39513950

3952-
auto opResultTy = mlir::dyn_cast<cir::VectorType>(getResult().getType());
3951+
auto opResultTy = mlir::dyn_cast<cir::VectorType>(getType());
39533952
if (!opResultTy)
39543953
return emitOpError() << "the type of the result must be a vector "
39553954
<< "if it is vector shift";

‎clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,7 @@ bool cir::LoadOp::canUsesBeRemoved(
8383
return false;
8484
Value blockingUse = (*blockingUses.begin())->get();
8585
return blockingUse == slot.ptr && getAddr() == slot.ptr &&
86-
getResult().getType() == slot.elemType;
86+
getType() == slot.elemType;
8787
}
8888

8989
DeletionKind cir::LoadOp::removeBlockingUses(

‎clang/lib/CIR/Dialect/Transforms/CallConvLowering.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,7 @@ struct CallConvLowering {
8282
}
8383

8484
void rewriteGetGlobalOp(GetGlobalOp op) {
85-
auto resTy = op.getResult().getType();
85+
auto resTy = op.getType();
8686
if (isFuncPointerTy(resTy)) {
8787
rewriter.setInsertionPoint(op);
8888
auto newOp = rewriter.replaceOpWithNewOp<GetGlobalOp>(op, convert(resTy),

‎clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1464,7 +1464,7 @@ void LoweringPreparePass::lowerStdFindOp(StdFindOp op) {
14641464
CIRBaseBuilderTy builder(getContext());
14651465
builder.setInsertionPointAfter(op.getOperation());
14661466
auto call = builder.createCallOp(
1467-
op.getLoc(), op.getOriginalFnAttr(), op.getResult().getType(),
1467+
op.getLoc(), op.getOriginalFnAttr(), op.getType(),
14681468
mlir::ValueRange{op.getOperand(0), op.getOperand(1), op.getOperand(2)});
14691469

14701470
op.replaceAllUsesWith(call);
@@ -1475,7 +1475,7 @@ void LoweringPreparePass::lowerIterBeginOp(IterBeginOp op) {
14751475
CIRBaseBuilderTy builder(getContext());
14761476
builder.setInsertionPointAfter(op.getOperation());
14771477
auto call = builder.createCallOp(op.getLoc(), op.getOriginalFnAttr(),
1478-
op.getResult().getType(), op.getOperand());
1478+
op.getType(), op.getOperand());
14791479

14801480
op.replaceAllUsesWith(call);
14811481
op.erase();
@@ -1485,7 +1485,7 @@ void LoweringPreparePass::lowerIterEndOp(IterEndOp op) {
14851485
CIRBaseBuilderTy builder(getContext());
14861486
builder.setInsertionPointAfter(op.getOperation());
14871487
auto call = builder.createCallOp(op.getLoc(), op.getOriginalFnAttr(),
1488-
op.getResult().getType(), op.getOperand());
1488+
op.getType(), op.getOperand());
14891489

14901490
op.replaceAllUsesWith(call);
14911491
op.erase();

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 13 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -378,7 +378,7 @@ static mlir::Value emitFromMemory(mlir::ConversionPatternRewriter &rewriter,
378378
cir::LoadOp op, mlir::Value value) {
379379

380380
// TODO(cir): Handle other types similarly to clang's codegen EmitFromMemory
381-
if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getResult().getType())) {
381+
if (auto boolTy = mlir::dyn_cast<cir::BoolType>(op.getType())) {
382382
// Create a cast value from specified size in datalayout to i1
383383
assert(value.getType().isInteger(dataLayout.getTypeSizeInBits(boolTy)));
384384
return createIntCast(rewriter, value, rewriter.getI1Type());
@@ -1207,7 +1207,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
12071207
}
12081208
case cir::CastKind::integral: {
12091209
auto srcType = castOp.getSrc().getType();
1210-
auto dstType = castOp.getResult().getType();
1210+
auto dstType = castOp.getType();
12111211
auto llvmSrcVal = adaptor.getSrc();
12121212
auto llvmDstType = getTypeConverter()->convertType(dstType);
12131213
cir::IntType srcIntType =
@@ -1222,11 +1222,10 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
12221222
}
12231223
case cir::CastKind::floating: {
12241224
auto llvmSrcVal = adaptor.getSrc();
1225-
auto llvmDstTy =
1226-
getTypeConverter()->convertType(castOp.getResult().getType());
1225+
auto llvmDstTy = getTypeConverter()->convertType(castOp.getType());
12271226

12281227
auto srcTy = elementTypeIfVector(castOp.getSrc().getType());
1229-
auto dstTy = elementTypeIfVector(castOp.getResult().getType());
1228+
auto dstTy = elementTypeIfVector(castOp.getType());
12301229

12311230
if (!mlir::isa<cir::CIRFPTypeInterface>(dstTy) ||
12321231
!mlir::isa<cir::CIRFPTypeInterface>(srcTy))
@@ -1314,8 +1313,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
13141313
auto dstTy = castOp.getType();
13151314
auto llvmSrcVal = adaptor.getSrc();
13161315
auto llvmDstTy = getTypeConverter()->convertType(dstTy);
1317-
if (mlir::cast<cir::IntType>(
1318-
elementTypeIfVector(castOp.getResult().getType()))
1316+
if (mlir::cast<cir::IntType>(elementTypeIfVector(castOp.getType()))
13191317
.isSigned())
13201318
rewriter.replaceOpWithNewOp<mlir::LLVM::FPToSIOp>(castOp, llvmDstTy,
13211319
llvmSrcVal);
@@ -1620,7 +1618,7 @@ mlir::LogicalResult CIRToLLVMAllocaOpLowering::matchAndRewrite(
16201618
rewriter.getIntegerAttr(rewriter.getIndexType(), 1));
16211619
auto elementTy =
16221620
convertTypeForMemory(*getTypeConverter(), dataLayout, op.getAllocaType());
1623-
auto resultTy = getTypeConverter()->convertType(op.getResult().getType());
1621+
auto resultTy = getTypeConverter()->convertType(op.getType());
16241622
// Verification between the CIR alloca AS and the one from data layout.
16251623
{
16261624
auto resPtrTy = mlir::cast<mlir::LLVM::LLVMPointerType>(resultTy);
@@ -1683,8 +1681,8 @@ static bool isLoadOrStoreInvariant(mlir::Value addr) {
16831681
mlir::LogicalResult CIRToLLVMLoadOpLowering::matchAndRewrite(
16841682
cir::LoadOp op, OpAdaptor adaptor,
16851683
mlir::ConversionPatternRewriter &rewriter) const {
1686-
const auto llvmTy = convertTypeForMemory(*getTypeConverter(), dataLayout,
1687-
op.getResult().getType());
1684+
const auto llvmTy =
1685+
convertTypeForMemory(*getTypeConverter(), dataLayout, op.getType());
16881686
auto memorder = op.getMemOrder();
16891687
auto ordering = getLLVMMemOrder(memorder);
16901688
auto alignOpt = op.getAlignment();
@@ -2302,8 +2300,7 @@ mlir::LogicalResult CIRToLLVMGetGlobalOpLowering::matchAndRewrite(
23022300
mlir::LogicalResult CIRToLLVMComplexCreateOpLowering::matchAndRewrite(
23032301
cir::ComplexCreateOp op, OpAdaptor adaptor,
23042302
mlir::ConversionPatternRewriter &rewriter) const {
2305-
auto complexLLVMTy =
2306-
getTypeConverter()->convertType(op.getResult().getType());
2303+
auto complexLLVMTy = getTypeConverter()->convertType(op.getType());
23072304
auto initialComplex =
23082305
rewriter.create<mlir::LLVM::UndefOp>(op->getLoc(), complexLLVMTy);
23092306

@@ -2322,7 +2319,7 @@ mlir::LogicalResult CIRToLLVMComplexCreateOpLowering::matchAndRewrite(
23222319
mlir::LogicalResult CIRToLLVMComplexRealOpLowering::matchAndRewrite(
23232320
cir::ComplexRealOp op, OpAdaptor adaptor,
23242321
mlir::ConversionPatternRewriter &rewriter) const {
2325-
auto resultLLVMTy = getTypeConverter()->convertType(op.getResult().getType());
2322+
auto resultLLVMTy = getTypeConverter()->convertType(op.getType());
23262323
rewriter.replaceOpWithNewOp<mlir::LLVM::ExtractValueOp>(
23272324
op, resultLLVMTy, adaptor.getOperand(), llvm::ArrayRef<std::int64_t>{0});
23282325
return mlir::success();
@@ -2331,7 +2328,7 @@ mlir::LogicalResult CIRToLLVMComplexRealOpLowering::matchAndRewrite(
23312328
mlir::LogicalResult CIRToLLVMComplexImagOpLowering::matchAndRewrite(
23322329
cir::ComplexImagOp op, OpAdaptor adaptor,
23332330
mlir::ConversionPatternRewriter &rewriter) const {
2334-
auto resultLLVMTy = getTypeConverter()->convertType(op.getResult().getType());
2331+
auto resultLLVMTy = getTypeConverter()->convertType(op.getType());
23352332
rewriter.replaceOpWithNewOp<mlir::LLVM::ExtractValueOp>(
23362333
op, resultLLVMTy, adaptor.getOperand(), llvm::ArrayRef<std::int64_t>{1});
23372334
return mlir::success();
@@ -2341,7 +2338,7 @@ mlir::LogicalResult CIRToLLVMComplexRealPtrOpLowering::matchAndRewrite(
23412338
cir::ComplexRealPtrOp op, OpAdaptor adaptor,
23422339
mlir::ConversionPatternRewriter &rewriter) const {
23432340
cir::PointerType operandTy = op.getOperand().getType();
2344-
auto resultLLVMTy = getTypeConverter()->convertType(op.getResult().getType());
2341+
auto resultLLVMTy = getTypeConverter()->convertType(op.getType());
23452342
auto elementLLVMTy = getTypeConverter()->convertType(operandTy.getPointee());
23462343

23472344
mlir::LLVM::GEPArg gepIndices[2]{{0}, {0}};
@@ -2356,7 +2353,7 @@ mlir::LogicalResult CIRToLLVMComplexImagPtrOpLowering::matchAndRewrite(
23562353
cir::ComplexImagPtrOp op, OpAdaptor adaptor,
23572354
mlir::ConversionPatternRewriter &rewriter) const {
23582355
cir::PointerType operandTy = op.getOperand().getType();
2359-
auto resultLLVMTy = getTypeConverter()->convertType(op.getResult().getType());
2356+
auto resultLLVMTy = getTypeConverter()->convertType(op.getType());
23602357
auto elementLLVMTy = getTypeConverter()->convertType(operandTy.getPointee());
23612358

23622359
mlir::LLVM::GEPArg gepIndices[2]{{0}, {1}};

‎clang/lib/CIR/Lowering/ThroughMLIR/LowerCIRToMLIR.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ static mlir::Value emitFromMemory(mlir::ConversionPatternRewriter &rewriter,
129129
cir::LoadOp op, mlir::Value value) {
130130

131131
// TODO(cir): Handle other types similarly to clang's codegen EmitFromMemory
132-
if (isa<cir::BoolType>(op.getResult().getType())) {
132+
if (isa<cir::BoolType>(op.getType())) {
133133
// Create trunc of value from i8 to i1
134134
// TODO: Use datalayout to get the size of bool
135135
assert(value.getType().isInteger(8));
@@ -1070,7 +1070,7 @@ class CIRCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
10701070
if (isa<cir::VectorType>(op.getSrc().getType()))
10711071
llvm_unreachable("CastOp lowering for vector type is not supported yet");
10721072
auto src = adaptor.getSrc();
1073-
auto dstType = op.getResult().getType();
1073+
auto dstType = op.getType();
10741074
using CIR = cir::CastKind;
10751075
switch (op.getKind()) {
10761076
case CIR::array_to_ptrdecay: {
@@ -1100,7 +1100,7 @@ class CIRCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
11001100
case CIR::floating: {
11011101
auto newDstType = convertTy(dstType);
11021102
auto srcTy = op.getSrc().getType();
1103-
auto dstTy = op.getResult().getType();
1103+
auto dstTy = op.getType();
11041104

11051105
if (!mlir::isa<cir::CIRFPTypeInterface>(dstTy) ||
11061106
!mlir::isa<cir::CIRFPTypeInterface>(srcTy))
@@ -1152,7 +1152,7 @@ class CIRCastOpLowering : public mlir::OpConversionPattern<cir::CastOp> {
11521152
case CIR::float_to_int: {
11531153
auto dstTy = op.getType();
11541154
auto newDstType = convertTy(dstTy);
1155-
if (mlir::cast<cir::IntType>(op.getResult().getType()).isSigned())
1155+
if (mlir::cast<cir::IntType>(op.getType()).isSigned())
11561156
rewriter.replaceOpWithNewOp<mlir::arith::FPToSIOp>(op, newDstType, src);
11571157
else
11581158
rewriter.replaceOpWithNewOp<mlir::arith::FPToUIOp>(op, newDstType, src);
@@ -1232,7 +1232,7 @@ class CIRPtrStrideOpLowering
12321232
if (!isa<mlir::memref::ReinterpretCastOp>(baseOp))
12331233
return mlir::failure();
12341234
auto base = baseOp->getOperand(0);
1235-
auto dstType = op.getResult().getType();
1235+
auto dstType = op.getType();
12361236
auto newDstType = mlir::cast<mlir::MemRefType>(convertTy(dstType));
12371237
auto stride = adaptor.getStride();
12381238
auto indexType = rewriter.getIndexType();

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