Skip to content

Commit 026686b

Browse files
committed
[RISCV] Don't add getFrameIndexInstrOffset in RISCVRegisterInfo::needsFrameBaseReg.
It's already added in isFrameOffsetLegal so adding it in needsFrameBaseReg causes it to be double counted.
1 parent 0817754 commit 026686b

File tree

2 files changed

+4
-7
lines changed

2 files changed

+4
-7
lines changed

llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -607,7 +607,6 @@ bool RISCVRegisterInfo::needsFrameBaseReg(MachineInstr *MI,
607607
const MachineFrameInfo &MFI = MF.getFrameInfo();
608608
const RISCVFrameLowering *TFI = getFrameLowering(MF);
609609
const MachineRegisterInfo &MRI = MF.getRegInfo();
610-
Offset += getFrameIndexInstrOffset(MI, FIOperandNum);
611610

612611
if (TFI->hasFP(MF) && !shouldRealignStack(MF)) {
613612
// Estimate the stack size used to store callee saved registers(

llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -88,9 +88,8 @@ define void @load_with_offset2() {
8888
; RV32I-NEXT: addi sp, sp, -2048
8989
; RV32I-NEXT: addi sp, sp, -464
9090
; RV32I-NEXT: .cfi_def_cfa_offset 2512
91-
; RV32I-NEXT: addi a0, sp, 1412
92-
; RV32I-NEXT: lbu a1, 0(a0)
93-
; RV32I-NEXT: sb a1, 0(a0)
91+
; RV32I-NEXT: lbu a0, 1412(sp)
92+
; RV32I-NEXT: sb a0, 1412(sp)
9493
; RV32I-NEXT: addi sp, sp, 2032
9594
; RV32I-NEXT: addi sp, sp, 480
9695
; RV32I-NEXT: ret
@@ -100,9 +99,8 @@ define void @load_with_offset2() {
10099
; RV64I-NEXT: addi sp, sp, -2048
101100
; RV64I-NEXT: addi sp, sp, -464
102101
; RV64I-NEXT: .cfi_def_cfa_offset 2512
103-
; RV64I-NEXT: addi a0, sp, 1412
104-
; RV64I-NEXT: lbu a1, 0(a0)
105-
; RV64I-NEXT: sb a1, 0(a0)
102+
; RV64I-NEXT: lbu a0, 1412(sp)
103+
; RV64I-NEXT: sb a0, 1412(sp)
106104
; RV64I-NEXT: addi sp, sp, 2032
107105
; RV64I-NEXT: addi sp, sp, 480
108106
; RV64I-NEXT: ret

0 commit comments

Comments
 (0)