UEFI backend for x86_64

Author: Prabhuk

llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

@@ -444,16 +444,14 @@ static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI,
     // Force the use of an ELF container.
     MAI = new X86ELFMCAsmInfo(TheTriple);
   } else if (TheTriple.isWindowsMSVCEnvironment() ||
-             TheTriple.isWindowsCoreCLREnvironment()) {
+             TheTriple.isWindowsCoreCLREnvironment() || TheTriple.isUEFI()) {
     if (Options.getAssemblyLanguage().equals_insensitive("masm"))
       MAI = new X86MCAsmInfoMicrosoftMASM(TheTriple);
     else
       MAI = new X86MCAsmInfoMicrosoft(TheTriple);
   } else if (TheTriple.isOSCygMing() ||
              TheTriple.isWindowsItaniumEnvironment()) {
     MAI = new X86MCAsmInfoGNUCOFF(TheTriple);
-  } else if (TheTriple.isUEFI()) {
-    MAI = new X86MCAsmInfoGNUCOFF(TheTriple);
   } else {
     // The default is ELF.
     MAI = new X86ELFMCAsmInfo(TheTriple);

llvm/lib/Target/X86/X86CallingConv.td

@@ -488,13 +488,24 @@ def RetCC_X86_64 : CallingConv<[
     CCIfSubtarget<"isTargetWin64()", CCIfRegCallv4<CCDelegateTo<RetCC_X86_Win64_RegCallv4>>>>,
 
   CCIfCC<"CallingConv::X86_RegCall",
-          CCIfSubtarget<"isTargetWin64()",
+    CCIfSubtarget<"isTargetUEFI64()", CCIfRegCallv4<CCDelegateTo<RetCC_X86_Win64_RegCallv4>>>>,
+
+  CCIfCC<"CallingConv::X86_RegCall",
+          CCIfSubtarget<"isTargetWin64()",                        
                         CCDelegateTo<RetCC_X86_Win64_RegCall>>>,
+
+  CCIfCC<"CallingConv::X86_RegCall",
+        CCIfSubtarget<"isTargetUEFI64()",
+                      CCDelegateTo<RetCC_X86_Win64_RegCall>>>,
+
   CCIfCC<"CallingConv::X86_RegCall", CCDelegateTo<RetCC_X86_SysV64_RegCall>>,
 
   // Mingw64 and native Win64 use Win64 CC
   CCIfSubtarget<"isTargetWin64()", CCDelegateTo<RetCC_X86_Win64_C>>,
 
+  // UEFI64 uses Win64 CC
+  CCIfSubtarget<"isTargetUEFI64()", CCDelegateTo<RetCC_X86_Win64_C>>,
+
   // Otherwise, drop to normal X86-64 CC
   CCDelegateTo<RetCC_X86_64_C>
 ]>;
@@ -1079,6 +1090,10 @@ def CC_X86_64 : CallingConv<[
     CCIfSubtarget<"isTargetWin64()", CCIfRegCallv4<CCDelegateTo<CC_X86_Win64_RegCallv4>>>>,
   CCIfCC<"CallingConv::X86_RegCall",
     CCIfSubtarget<"isTargetWin64()", CCDelegateTo<CC_X86_Win64_RegCall>>>,
+  CCIfCC<"CallingConv::X86_RegCall",
+    CCIfSubtarget<"isTargetUEFI64()", CCIfRegCallv4<CCDelegateTo<CC_X86_Win64_RegCallv4>>>>,
+  CCIfCC<"CallingConv::X86_RegCall",
+    CCIfSubtarget<"isTargetUEFI64()", CCDelegateTo<CC_X86_Win64_RegCall>>>,
   CCIfCC<"CallingConv::X86_RegCall", CCDelegateTo<CC_X86_SysV64_RegCall>>,
   CCIfCC<"CallingConv::PreserveNone", CCDelegateTo<CC_X86_64_Preserve_None>>,
   CCIfCC<"CallingConv::X86_INTR", CCCustom<"CC_X86_Intr">>,

llvm/lib/Target/X86/X86FrameLowering.cpp

@@ -1533,11 +1533,16 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
                                     MachineBasicBlock &MBB) const {
   assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
          "MF used frame lowering for wrong subtarget");
+
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineFrameInfo &MFI = MF.getFrameInfo();
   const Function &Fn = MF.getFunction();
+
   X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
   uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
+
+  // errs() << "********** MaxAlign size " << MaxAlign;
+
   uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
   bool IsFunclet = MBB.isEHFuncletEntry();
   EHPersonality Personality = EHPersonality::Unknown;
@@ -1548,6 +1553,12 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
   bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
   bool HasFP = hasFP(MF);
   bool IsWin64Prologue = isWin64Prologue(MF);
+
+  // if(IsWin64Prologue) {
+  //   errs() << "********** IsWin64Prologue TRUE ";
+  // } else {
+  //   errs() << "********** IsWin64Prologue FALSE FALSE FALSE ";
+  // }
   bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
   // FIXME: Emit FPO data for EH funclets.
   bool NeedsWinFPO = !IsFunclet && STI.isTargetWin32() &&
@@ -1671,6 +1682,12 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
   // pointer, calls, or dynamic alloca then we do not need to adjust the
   // stack pointer (we fit in the Red Zone). We also check that we don't
   // push and pop from the stack.
+
+  // if (has128ByteRedZone(MF)) {
+  //   errs() << "********** has128ByteRedZone TRUE ";
+  // } else {
+  //   errs() << "********** has128ByteRedZone FALSE FALSE FALSE ";
+  // }
   if (has128ByteRedZone(MF) && !TRI->hasStackRealignment(MF) &&
       !MFI.hasVarSizedObjects() &&             // No dynamic alloca.
       !MFI.adjustsStack() &&                   // No calls.
@@ -1679,6 +1696,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
       !MF.shouldSplitStack()) {                // Regular stack
     uint64_t MinSize =
         X86FI->getCalleeSavedFrameSize() - X86FI->getTCReturnAddrDelta();
+
     if (HasFP)
       MinSize += SlotSize;
     X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
@@ -1894,7 +1912,9 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
            Opc == X86::PUSH2 || Opc == X86::PUSH2P;
   };
 
+  // uint64_t cont3 = 1;
   while (IsCSPush(MBBI)) {
+    // llvm::outs() << "\n*********** cont3 " << cont3++;
     PushedRegs = true;
     Register Reg = MBBI->getOperand(0).getReg();
     LastCSPush = MBBI;

llvm/lib/Target/X86/X86ISelLowering.cpp

@@ -578,6 +578,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
   // FIXME - use subtarget debug flags
   if (!Subtarget.isTargetDarwin() && !Subtarget.isTargetELF() &&
       !Subtarget.isTargetCygMing() && !Subtarget.isTargetWin64() &&
+      !Subtarget.isTargetUEFI64() &&
       TM.Options.ExceptionModel != ExceptionHandling::SjLj) {
     setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
   }
@@ -2543,7 +2544,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::FSINCOS, MVT::f32, Custom);
   }
 
-  if (Subtarget.isTargetWin64()) {
+  if (Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) {
     setOperationAction(ISD::SDIV, MVT::i128, Custom);
     setOperationAction(ISD::UDIV, MVT::i128, Custom);
     setOperationAction(ISD::SREM, MVT::i128, Custom);
@@ -19656,7 +19657,8 @@ SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
   else if (isLegalConversion(SrcVT, true, Subtarget))
     return Op;
 
-  if (Subtarget.isTargetWin64() && SrcVT == MVT::i128)
+  if ((Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) &&
+      SrcVT == MVT::i128)
     return LowerWin64_INT128_TO_FP(Op, DAG);
 
   if (SDValue Extract = vectorizeExtractedCast(Op, dl, DAG, Subtarget))
@@ -20163,7 +20165,8 @@ SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
   if (DstVT.isVector())
     return lowerUINT_TO_FP_vec(Op, dl, DAG, Subtarget);
 
-  if (Subtarget.isTargetWin64() && SrcVT == MVT::i128)
+  if ((Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) &&
+      SrcVT == MVT::i128)
     return LowerWin64_INT128_TO_FP(Op, DAG);
 
   if (SDValue Extract = vectorizeExtractedCast(Op, dl, DAG, Subtarget))
@@ -27880,7 +27883,6 @@ Register X86TargetLowering::getRegisterByName(const char* RegName, LLT VT,
                      .Case("r14", X86::R14)
                      .Case("r15", X86::R15)
                      .Default(0);
-
   if (Reg == X86::EBP || Reg == X86::RBP) {
     if (!TFI.hasFP(MF))
       report_fatal_error("register " + StringRef(RegName) +
@@ -27924,7 +27926,7 @@ Register X86TargetLowering::getExceptionSelectorRegister(
 }
 
 bool X86TargetLowering::needsFixedCatchObjects() const {
-  return Subtarget.isTargetWin64();
+  return Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64();
 }
 
 SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
@@ -29515,7 +29517,8 @@ static SDValue LowerMULO(SDValue Op, const X86Subtarget &Subtarget,
 }
 
 SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
-  assert(Subtarget.isTargetWin64() && "Unexpected target");
+  assert((Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) &&
+         "Unexpected target");
   EVT VT = Op.getValueType();
   assert(VT.isInteger() && VT.getSizeInBits() == 128 &&
          "Unexpected return type for lowering");
@@ -29582,7 +29585,8 @@ SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) cons
 SDValue X86TargetLowering::LowerWin64_FP_TO_INT128(SDValue Op,
                                                    SelectionDAG &DAG,
                                                    SDValue &Chain) const {
-  assert(Subtarget.isTargetWin64() && "Unexpected target");
+  assert((Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) &&
+         "Unexpected target");
   EVT VT = Op.getValueType();
   bool IsStrict = Op->isStrictFPOpcode();
 
@@ -29615,7 +29619,8 @@ SDValue X86TargetLowering::LowerWin64_FP_TO_INT128(SDValue Op,
 
 SDValue X86TargetLowering::LowerWin64_INT128_TO_FP(SDValue Op,
                                                    SelectionDAG &DAG) const {
-  assert(Subtarget.isTargetWin64() && "Unexpected target");
+  assert((Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64()) &&
+         "Unexpected target");
   EVT VT = Op.getValueType();
   bool IsStrict = Op->isStrictFPOpcode();
 
@@ -33861,7 +33866,8 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
       return;
     }
 
-    if (VT == MVT::i128 && Subtarget.isTargetWin64()) {
+    if (VT == MVT::i128 &&
+        (Subtarget.isTargetWin64() || Subtarget.isTargetUEFI64())) {
       SDValue Chain;
       SDValue V = LowerWin64_FP_TO_INT128(SDValue(N, 0), DAG, Chain);
       Results.push_back(V);
@@ -37136,6 +37142,8 @@ X86TargetLowering::EmitSjLjDispatchBlock(MachineInstr &MI,
   // N.B. the order the invoke BBs are processed in doesn't matter here.
   SmallVector<MachineBasicBlock *, 64> MBBLPads;
   const MCPhysReg *SavedRegs = MF->getRegInfo().getCalleeSavedRegs();
+  // llvm::outs() << "Callee saved regs from isellowering " <<
+  // SavedRegs->
   for (MachineBasicBlock *MBB : InvokeBBs) {
     // Remove the landing pad successor from the invoke block and replace it
     // with the new dispatch block.
@@ -60753,8 +60761,8 @@ bool X86TargetLowering::hasStackProbeSymbol(const MachineFunction &MF) const {
 /// Returns true if stack probing through inline assembly is requested.
 bool X86TargetLowering::hasInlineStackProbe(const MachineFunction &MF) const {
 
-  // No inline stack probe for Windows, they have their own mechanism.
-  if (Subtarget.isOSWindows() ||
+  // No inline stack probe for Windows and UEFI, they have their own mechanism.
+  if (Subtarget.isOSWindows() || Subtarget.isUEFI() ||
       MF.getFunction().hasFnAttribute("no-stack-arg-probe"))
     return false;
 
@@ -60778,9 +60786,10 @@ X86TargetLowering::getStackProbeSymbolName(const MachineFunction &MF) const {
   if (MF.getFunction().hasFnAttribute("probe-stack"))
     return MF.getFunction().getFnAttribute("probe-stack").getValueAsString();
 
-  // Generally, if we aren't on Windows, the platform ABI does not include
-  // support for stack probes, so don't emit them.
-  if (!Subtarget.isOSWindows() || Subtarget.isTargetMachO() ||
+  // Generally, if we aren't on Windows or UEFI, the platform ABI does not
+  // include support for stack probes, so don't emit them.
+  if (!(Subtarget.isOSWindows() || Subtarget.isUEFI()) ||
+      Subtarget.isTargetMachO() ||
       MF.getFunction().hasFnAttribute("no-stack-arg-probe"))
     return "";
 

llvm/lib/Target/X86/X86RegisterInfo.cpp

@@ -60,6 +60,7 @@ X86RegisterInfo::X86RegisterInfo(const Triple &TT)
   // Cache some information.
   Is64Bit = TT.isArch64Bit();
   IsWin64 = Is64Bit && TT.isOSWindows();
+  IsUEFI64 = Is64Bit && TT.isUEFI();
 
   // Use a callee-saved register as the base pointer.  These registers must
   // not conflict with any ABI requirements.  For example, in 32-bit mode PIC
@@ -242,7 +243,7 @@ bool X86RegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC,
 const TargetRegisterClass *
 X86RegisterInfo::getGPRsForTailCall(const MachineFunction &MF) const {
   const Function &F = MF.getFunction();
-  if (IsWin64 || (F.getCallingConv() == CallingConv::Win64))
+  if (IsWin64 || IsUEFI64 || (F.getCallingConv() == CallingConv::Win64))
     return &X86::GR64_TCW64RegClass;
   else if (Is64Bit)
     return &X86::GR64_TCRegClass;
@@ -344,7 +345,7 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
   }
   case CallingConv::X86_RegCall:
     if (Is64Bit) {
-      if (IsWin64) {
+      if (IsWin64 || IsUEFI64) {
         return (HasSSE ? CSR_Win64_RegCall_SaveList :
                          CSR_Win64_RegCall_NoSSE_SaveList);
       } else {
@@ -404,7 +405,7 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
       return IsWin64 ? CSR_Win64_SwiftError_SaveList
                      : CSR_64_SwiftError_SaveList;
 
-    if (IsWin64)
+    if (IsWin64 || IsUEFI64)
       return HasSSE ? CSR_Win64_SaveList : CSR_Win64_NoSSE_SaveList;
     if (CallsEHReturn)
       return CSR_64EHRet_SaveList;
@@ -471,7 +472,7 @@ X86RegisterInfo::getCallPreservedMask(const MachineFunction &MF,
   }
   case CallingConv::X86_RegCall:
     if (Is64Bit) {
-      if (IsWin64) {
+      if (IsWin64 || IsUEFI64) {
         return (HasSSE ? CSR_Win64_RegCall_RegMask :
                          CSR_Win64_RegCall_NoSSE_RegMask);
       } else {
@@ -529,7 +530,7 @@ X86RegisterInfo::getCallPreservedMask(const MachineFunction &MF,
     if (IsSwiftCC)
       return IsWin64 ? CSR_Win64_SwiftError_RegMask : CSR_64_SwiftError_RegMask;
 
-    return IsWin64 ? CSR_Win64_RegMask : CSR_64_RegMask;
+    return (IsWin64 || IsUEFI64) ? CSR_Win64_RegMask : CSR_64_RegMask;
   }
 
   return CSR_32_RegMask;

llvm/lib/Target/X86/X86RegisterInfo.h

@@ -27,10 +27,14 @@ class X86RegisterInfo final : public X86GenRegisterInfo {
   ///
   bool Is64Bit;
 
-  /// IsWin64 - Is the target on of win64 flavours
+  /// IsWin64 - Is the target one of win64 flavours
   ///
   bool IsWin64;
 
+  /// IsUEFI64 - Is this UEFI 64 bit target
+  ///
+  bool IsUEFI64;
+
   /// SlotSize - Stack slot size in bytes.
   ///
   unsigned SlotSize;

llvm/lib/Target/X86/X86Subtarget.h

@@ -321,7 +321,11 @@ class X86Subtarget final : public X86GenSubtargetInfo {
 
   bool isOSWindows() const { return TargetTriple.isOSWindows(); }
 
-  bool isTargetWin64() const { return Is64Bit && isOSWindows(); }
+  bool isUEFI() const { return TargetTriple.isUEFI(); }
+
+  bool isTargetUEFI64() const { return Is64Bit && isUEFI(); }
+
+  bool isTargetWin64() const { return Is64Bit && (isOSWindows() || isUEFI()); }
 
   bool isTargetWin32() const { return !Is64Bit && isOSWindows(); }
 
@@ -335,8 +339,11 @@ class X86Subtarget final : public X86GenSubtargetInfo {
   bool isPositionIndependent() const;
 
   bool isCallingConvWin64(CallingConv::ID CC) const {
+    // llvm::outs() << "\nIn isCallingConvWin64 check calling
+    // convention******************* ";
     switch (CC) {
-    // On Win64, all these conventions just use the default convention.
+    // On Win64 and UEFI64, all these conventions just use the default
+    // convention.
     case CallingConv::C:
     case CallingConv::Fast:
     case CallingConv::Tail:
@@ -347,9 +354,11 @@ class X86Subtarget final : public X86GenSubtargetInfo {
     case CallingConv::X86_ThisCall:
     case CallingConv::X86_VectorCall:
     case CallingConv::Intel_OCL_BI:
-      return isTargetWin64();
+      return isTargetWin64() || isTargetUEFI64();
     // This convention allows using the Win64 convention on other targets.
     case CallingConv::Win64:
+      // llvm::outs() << "\nReturning true for Win64 calling
+      // convention******************* ";
       return true;
     // This convention allows using the SysV convention on Windows targets.
     case CallingConv::X86_64_SysV:

llvm/lib/Target/X86/X86TargetMachine.cpp

@@ -484,7 +484,7 @@ void X86PassConfig::addIRPasses() {
 
   // Add Control Flow Guard checks.
   const Triple &TT = TM->getTargetTriple();
-  if (TT.isOSWindows()) {
+  if (TT.isOSWindows() || TT.isUEFI()) {
     if (TT.getArch() == Triple::x86_64) {
       addPass(createCFGuardDispatchPass());
     } else {

llvm/test/CodeGen/X86/mangle-question-mark.ll

@@ -2,6 +2,7 @@
 
 ; RUN: llc -mtriple i686-pc-win32 < %s | FileCheck %s --check-prefix=COFF
 ; RUN: llc -mtriple x86_64-pc-win32 < %s | FileCheck %s --check-prefix=COFF64
+; RUN: llc -mtriple x86_64-unknown-uefi < %s | FileCheck %s --check-prefix=COFF64
 ; RUN: llc -mtriple i686-linux-gnu < %s | FileCheck %s --check-prefix=ELF
 ; RUN: llc -mtriple i686-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
 

llvm/test/CodeGen/X86/sse-regcall.ll

@@ -1,6 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+sse | FileCheck --check-prefix=WIN32 %s
 ; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck --check-prefix=WIN64 %s
+; RUN: llc < %s -mtriple=x86_64-unknown-uefi -mattr=+sse | FileCheck --check-prefix=WIN64 %s
 ; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck --check-prefix=LINUXOSX %s
 
 ; Test regcall when receiving/returning i1