@@ -239,11 +239,6 @@ static cl::opt<bool> EnableRedZone("aarch64-redzone",
239239 cl::desc (" enable use of redzone on AArch64" ),
240240 cl::init(false ), cl::Hidden);
241241
242- static cl::opt<bool >
243- ReverseCSRRestoreSeq (" reverse-csr-restore-seq" ,
244- cl::desc (" reverse the CSR restore sequence" ),
245- cl::init(false ), cl::Hidden);
246-
247242static cl::opt<bool > StackTaggingMergeSetTag (
248243 " stack-tagging-merge-settag" ,
249244 cl::desc (" merge settag instruction in function epilog" ), cl::init(true ),
@@ -307,8 +302,6 @@ bool AArch64FrameLowering::homogeneousPrologEpilog(
307302 return false ;
308303 if (!EnableHomogeneousPrologEpilog)
309304 return false ;
310- if (ReverseCSRRestoreSeq)
311- return false ;
312305 if (EnableRedZone)
313306 return false ;
314307
@@ -3117,7 +3110,27 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
31173110
31183111 computeCalleeSaveRegisterPairs (MF, CSI, TRI, RegPairs, hasFP (MF));
31193112
3120- auto EmitMI = [&](const RegPairInfo &RPI) -> MachineBasicBlock::iterator {
3113+ if (homogeneousPrologEpilog (MF, &MBB)) {
3114+ auto MIB = BuildMI (MBB, MBBI, DL, TII.get (AArch64::HOM_Epilog))
3115+ .setMIFlag (MachineInstr::FrameDestroy);
3116+ for (auto &RPI : RegPairs) {
3117+ MIB.addReg (RPI.Reg1 , RegState::Define);
3118+ MIB.addReg (RPI.Reg2 , RegState::Define);
3119+ }
3120+ return true ;
3121+ }
3122+
3123+ // For performance reasons restore SVE register in increasing order
3124+ auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
3125+ auto PPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsPPR);
3126+ auto PPREnd = std::find_if_not (PPRBegin, RegPairs.end (), IsPPR);
3127+ std::reverse (PPRBegin, PPREnd);
3128+ auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
3129+ auto ZPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsZPR);
3130+ auto ZPREnd = std::find_if_not (ZPRBegin, RegPairs.end (), IsZPR);
3131+ std::reverse (ZPRBegin, ZPREnd);
3132+
3133+ for (const RegPairInfo &RPI : RegPairs) {
31213134 unsigned Reg1 = RPI.Reg1 ;
31223135 unsigned Reg2 = RPI.Reg2 ;
31233136
@@ -3191,43 +3204,6 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
31913204 MachineMemOperand::MOLoad, Size, Alignment));
31923205 if (NeedsWinCFI)
31933206 InsertSEH (MIB, TII, MachineInstr::FrameDestroy);
3194-
3195- return MIB->getIterator ();
3196- };
3197-
3198- if (homogeneousPrologEpilog (MF, &MBB)) {
3199- auto MIB = BuildMI (MBB, MBBI, DL, TII.get (AArch64::HOM_Epilog))
3200- .setMIFlag (MachineInstr::FrameDestroy);
3201- for (auto &RPI : RegPairs) {
3202- MIB.addReg (RPI.Reg1 , RegState::Define);
3203- MIB.addReg (RPI.Reg2 , RegState::Define);
3204- }
3205- return true ;
3206- }
3207-
3208- // For performance reasons restore SVE register in increasing order
3209- auto IsPPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::PPR; };
3210- auto PPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsPPR);
3211- auto PPREnd = std::find_if_not (PPRBegin, RegPairs.end (), IsPPR);
3212- std::reverse (PPRBegin, PPREnd);
3213- auto IsZPR = [](const RegPairInfo &c) { return c.Type == RegPairInfo::ZPR; };
3214- auto ZPRBegin = std::find_if (RegPairs.begin (), RegPairs.end (), IsZPR);
3215- auto ZPREnd = std::find_if_not (ZPRBegin, RegPairs.end (), IsZPR);
3216- std::reverse (ZPRBegin, ZPREnd);
3217-
3218- if (ReverseCSRRestoreSeq) {
3219- MachineBasicBlock::iterator First = MBB.end ();
3220- for (const RegPairInfo &RPI : reverse (RegPairs)) {
3221- MachineBasicBlock::iterator It = EmitMI (RPI);
3222- if (First == MBB.end ())
3223- First = It;
3224- }
3225- if (First != MBB.end ())
3226- MBB.splice (MBBI, &MBB, First);
3227- } else {
3228- for (const RegPairInfo &RPI : RegPairs) {
3229- (void )EmitMI (RPI);
3230- }
32313207 }
32323208
32333209 return true ;
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