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1 parent 3adf819 commit 23fe66eCopy full SHA for 23fe66e
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -4043,7 +4043,8 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
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if (CondVal->getType() == SI.getType() && isKnownInversion(FalseVal, TrueVal))
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return BinaryOperator::CreateXor(CondVal, FalseVal);
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- if (SelType->isIntOrIntVectorTy()) {
+ if (SelType->isIntOrIntVectorTy() &&
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+ (!isa<Constant>(TrueVal) || !isa<Constant>(FalseVal))) {
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// Try to simplify select arms based on KnownBits implied by the condition.
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CondContext CC(CondVal);
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findValuesAffectedByCondition(CondVal, /*IsAssume=*/false, [&](Value *V) {
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