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tstellardtcxzyw
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Update llvm/test/Transforms/InstCombine/bit_ceil.ll
Co-authored-by: Yingwei Zheng <dtcxzyw@qq.com>
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llvm/test/Transforms/InstCombine/bit_ceil.ll

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@@ -287,7 +287,7 @@ define <4 x i32> @bit_ceil_v4i32(<4 x i32> %x) {
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define i32 @pr91691(i32 %0) {
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; CHECK-LABEL: @pr91691(
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; CHECK-NEXT: [[TMP2:%.*]] = sub i32 -2, [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP2]], i1 false)
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; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[TMP2]], i1 false), !range [[RNG0]]
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; CHECK-NEXT: [[TMP4:%.*]] = sub nsw i32 0, [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP4]], 31
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; CHECK-NEXT: [[TMP6:%.*]] = shl nuw i32 1, [[TMP5]]
@@ -305,7 +305,7 @@ define i32 @pr91691(i32 %0) {
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define i32 @pr91691_keep_nsw(i32 %0) {
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; CHECK-LABEL: @pr91691_keep_nsw(
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; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 -2, [[TMP0:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP2]], i1 false)
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; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[TMP2]], i1 false), !range [[RNG0]]
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; CHECK-NEXT: [[TMP4:%.*]] = sub nsw i32 0, [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP4]], 31
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; CHECK-NEXT: [[TMP6:%.*]] = shl nuw i32 1, [[TMP5]]

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