Skip to content

Commit 33acba4

Browse files
committed
[AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough
This updates the AVR Select8/Select16 expansion code so that, when inserting the two basic blocks for true and false conditions, any existing fallthrough on the previous block is preserved. Prior to this patch, if the block before the Select pseudo fell through to the subsequent block, two new basic blocks would be inserted at the prior fallthrough point, changing the fallthrough destination. The predecessor or successor lists were not updated, causing the BranchFolding pass at -O1 and above the rearrange basic blocks, causing an infinite loop. Not to mention the unconditional fallthrough to the true block is incorrect in of itself. This patch modifies the Select8/16 expansion so that, if inserting true and false basic blocks at a fallthrough point, the implicit branch is preserved by means of an explicit, unconditional branch to the previous fallthrough destination. Thanks to Carl Peto for reporting this bug. This fixes avr-rust bug avr-rust/rust-legacy-fork#123. llvm-svn: 351718
1 parent d733430 commit 33acba4

File tree

2 files changed

+74
-0
lines changed

2 files changed

+74
-0
lines changed

llvm/lib/Target/AVR/AVRISelLowering.cpp

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1634,6 +1634,15 @@ AVRTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
16341634

16351635
MachineFunction *MF = MBB->getParent();
16361636
const BasicBlock *LLVM_BB = MBB->getBasicBlock();
1637+
MachineBasicBlock *FallThrough = MBB->getFallThrough();
1638+
1639+
// If the current basic block falls through to another basic block,
1640+
// we must insert an unconditional branch to the fallthrough destination
1641+
// if we are to insert basic blocks at the prior fallthrough point.
1642+
if (FallThrough != nullptr) {
1643+
BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough);
1644+
}
1645+
16371646
MachineBasicBlock *trueMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16381647
MachineBasicBlock *falseMBB = MF->CreateMachineBasicBlock(LLVM_BB);
16391648

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
1+
; RUN: llc -O1 < %s -march=avr | FileCheck %s
2+
3+
; This test ensures that the Select8/Select16 expansion
4+
; pass inserts an unconditional branch to the previous adjacent
5+
; basic block when inserting new basic blocks when the
6+
; prior block has a fallthrough.
7+
;
8+
; Before this bug was fixed, Select8/Select16 expansion
9+
; would leave a dangling fallthrough to an undefined block.
10+
;
11+
; The BranchFolding pass would later rearrange the basic
12+
; blocks based on predecessor/successor list assumptions
13+
; which were made incorrect due to the invalid Select
14+
; expansion.
15+
16+
; More information in
17+
; https://github.com/avr-rust/rust/issues/123.
18+
19+
%UInt8 = type <{ i8 }>
20+
%UInt32 = type <{ i32 }>
21+
%Sb = type <{ i1 }>
22+
23+
@delayFactor = hidden global %UInt8 zeroinitializer, align 1
24+
@delay = hidden global %UInt32 zeroinitializer, align 4
25+
@flag = hidden global %Sb zeroinitializer, align 1
26+
27+
declare void @eeprom_write(i16, i8)
28+
29+
define hidden void @update_register(i8 %arg, i8 %arg1) {
30+
entry:
31+
switch i8 %arg, label %bb7 [
32+
i8 6, label %bb
33+
i8 7, label %bb6
34+
]
35+
36+
bb: ; preds = %entry
37+
%tmp = icmp ugt i8 %arg1, 90
38+
%tmp2 = icmp ult i8 %arg1, 5
39+
%. = select i1 %tmp2, i8 5, i8 %arg1
40+
%tmp3 = select i1 %tmp, i8 90, i8 %.
41+
store i8 %tmp3, i8* getelementptr inbounds (%UInt8, %UInt8* @delayFactor, i64 0, i32 0), align 1
42+
%tmp4 = zext i8 %tmp3 to i32
43+
%tmp5 = mul nuw nsw i32 %tmp4, 100
44+
store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4
45+
tail call void @eeprom_write(i16 34, i8 %tmp3)
46+
br label %bb7
47+
48+
bb6: ; preds = %entry
49+
%not. = icmp ne i8 %arg1, 0
50+
%.2 = zext i1 %not. to i8
51+
store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @flag, i64 0, i32 0), align 1
52+
53+
; CHECK: LBB0_{{[0-9]+}}:
54+
; CHECK: call eeprom_write
55+
; CHECK-NEXT: LBB0_{{[0-9]+}}
56+
; CHECK-NEXT: pop r{{[0-9]+}}
57+
; CHECK-NEXT: ret
58+
59+
tail call void @eeprom_write(i16 35, i8 %.2)
60+
br label %bb7
61+
62+
bb7: ; preds = %bb6, %bb, %entry
63+
ret void
64+
}
65+

0 commit comments

Comments
 (0)