|
| 1 | +; RUN: llc -O1 < %s -march=avr | FileCheck %s |
| 2 | + |
| 3 | +; This test ensures that the Select8/Select16 expansion |
| 4 | +; pass inserts an unconditional branch to the previous adjacent |
| 5 | +; basic block when inserting new basic blocks when the |
| 6 | +; prior block has a fallthrough. |
| 7 | +; |
| 8 | +; Before this bug was fixed, Select8/Select16 expansion |
| 9 | +; would leave a dangling fallthrough to an undefined block. |
| 10 | +; |
| 11 | +; The BranchFolding pass would later rearrange the basic |
| 12 | +; blocks based on predecessor/successor list assumptions |
| 13 | +; which were made incorrect due to the invalid Select |
| 14 | +; expansion. |
| 15 | + |
| 16 | +; More information in |
| 17 | +; https://github.com/avr-rust/rust/issues/123. |
| 18 | + |
| 19 | +%UInt8 = type <{ i8 }> |
| 20 | +%UInt32 = type <{ i32 }> |
| 21 | +%Sb = type <{ i1 }> |
| 22 | + |
| 23 | +@delayFactor = hidden global %UInt8 zeroinitializer, align 1 |
| 24 | +@delay = hidden global %UInt32 zeroinitializer, align 4 |
| 25 | +@flag = hidden global %Sb zeroinitializer, align 1 |
| 26 | + |
| 27 | +declare void @eeprom_write(i16, i8) |
| 28 | + |
| 29 | +define hidden void @update_register(i8 %arg, i8 %arg1) { |
| 30 | +entry: |
| 31 | + switch i8 %arg, label %bb7 [ |
| 32 | + i8 6, label %bb |
| 33 | + i8 7, label %bb6 |
| 34 | + ] |
| 35 | + |
| 36 | +bb: ; preds = %entry |
| 37 | + %tmp = icmp ugt i8 %arg1, 90 |
| 38 | + %tmp2 = icmp ult i8 %arg1, 5 |
| 39 | + %. = select i1 %tmp2, i8 5, i8 %arg1 |
| 40 | + %tmp3 = select i1 %tmp, i8 90, i8 %. |
| 41 | + store i8 %tmp3, i8* getelementptr inbounds (%UInt8, %UInt8* @delayFactor, i64 0, i32 0), align 1 |
| 42 | + %tmp4 = zext i8 %tmp3 to i32 |
| 43 | + %tmp5 = mul nuw nsw i32 %tmp4, 100 |
| 44 | + store i32 %tmp5, i32* getelementptr inbounds (%UInt32, %UInt32* @delay, i64 0, i32 0), align 4 |
| 45 | + tail call void @eeprom_write(i16 34, i8 %tmp3) |
| 46 | + br label %bb7 |
| 47 | + |
| 48 | +bb6: ; preds = %entry |
| 49 | + %not. = icmp ne i8 %arg1, 0 |
| 50 | + %.2 = zext i1 %not. to i8 |
| 51 | + store i1 %not., i1* getelementptr inbounds (%Sb, %Sb* @flag, i64 0, i32 0), align 1 |
| 52 | + |
| 53 | + ; CHECK: LBB0_{{[0-9]+}}: |
| 54 | + ; CHECK: call eeprom_write |
| 55 | + ; CHECK-NEXT: LBB0_{{[0-9]+}} |
| 56 | + ; CHECK-NEXT: pop r{{[0-9]+}} |
| 57 | + ; CHECK-NEXT: ret |
| 58 | + |
| 59 | + tail call void @eeprom_write(i16 35, i8 %.2) |
| 60 | + br label %bb7 |
| 61 | + |
| 62 | +bb7: ; preds = %bb6, %bb, %entry |
| 63 | + ret void |
| 64 | +} |
| 65 | + |
0 commit comments