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[DAG] Recombine (binop (shift x y))
This helps address regressions in D127115 . Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D141809
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+16
-10
lines changed

2 files changed

+16
-10
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

+14-7
Original file line numberDiff line numberDiff line change
@@ -9923,16 +9923,23 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
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// However when after the source operand of SRL is optimized into AND, the SRL
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// itself may not be optimized further. Look for it and add the BRCOND into
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// the worklist.
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//
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// The also tends to happen for binary operations when SimplifyDemandedBits
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// is involved.
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//
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// FIXME: This is unecessary if we process the DAG in topological order,
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// which we plan to do. This workaround can be removed once the DAG is
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// processed in topological order.
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if (N->hasOneUse()) {
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SDNode *Use = *N->use_begin();
9928-
if (Use->getOpcode() == ISD::BRCOND)
9929-
AddToWorklist(Use);
9930-
else if (Use->getOpcode() == ISD::TRUNCATE && Use->hasOneUse()) {
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// Also look pass the truncate.
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// Look pass the truncate.
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if (Use->getOpcode() == ISD::TRUNCATE && Use->hasOneUse())
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Use = *Use->use_begin();
9933-
if (Use->getOpcode() == ISD::BRCOND)
9934-
AddToWorklist(Use);
9935-
}
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if (Use->getOpcode() == ISD::BRCOND || Use->getOpcode() == ISD::AND ||
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Use->getOpcode() == ISD::OR || Use->getOpcode() == ISD::XOR)
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AddToWorklist(Use);
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}
99379944

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// Try to transform this shift into a multiply-high if

llvm/test/CodeGen/X86/bool-math.ll

+2-3
Original file line numberDiff line numberDiff line change
@@ -262,10 +262,9 @@ define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
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define i1 @opaque_constant(i48 %x, i48 %y) {
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; X64-LABEL: opaque_constant:
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; X64: # %bb.0:
265-
; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: shrq $32, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: xorq %rsi, %rax
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; X64-NEXT: shrq $32, %rax
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; X64-NEXT: xorl %edi, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: # kill: def $al killed $al killed $rax
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; X64-NEXT: retq

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