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[X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390)
Fixes #90356 (cherry picked from commit 35b89dd)
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+35
-3
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2 files changed

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llvm/lib/Target/X86/X86Subtarget.h

+2-1
Original file line numberDiff line numberDiff line change
@@ -244,7 +244,8 @@ class X86Subtarget final : public X86GenSubtargetInfo {
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// TODO: Currently we're always allowing widening on CPUs without VLX,
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// because for many cases we don't have a better option.
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bool canExtendTo512DQ() const {
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return hasAVX512() && (!hasVLX() || getPreferVectorWidth() >= 512);
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return hasAVX512() && hasEVEX512() &&
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(!hasVLX() || getPreferVectorWidth() >= 512);
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}
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bool canExtendTo512BW() const {
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return hasBWI() && canExtendTo512DQ();

llvm/test/CodeGen/X86/avx512bwvl-arith.ll

+33-2
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,EVEX256
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-evex512 | FileCheck %s --check-prefixes=CHECK,EVEX512
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; 256-bit
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@@ -236,3 +236,34 @@ define <8 x i16> @vpmullw128_test(<8 x i16> %i, <8 x i16> %j) {
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ret <8 x i16> %x
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}
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define i16 @PR90356(<16 x i1> %a) {
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; EVEX256-LABEL: PR90356:
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; EVEX256: # %bb.0:
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; EVEX256-NEXT: vpsllw $7, %xmm0, %xmm0
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; EVEX256-NEXT: vpmovb2m %xmm0, %k1
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; EVEX256-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
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; EVEX256-NEXT: movb $63, %al
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; EVEX256-NEXT: kmovd %eax, %k1
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; EVEX256-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z}
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; EVEX256-NEXT: vptestmd %zmm0, %zmm0, %k0
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; EVEX256-NEXT: kmovd %k0, %eax
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; EVEX256-NEXT: # kill: def $ax killed $ax killed $eax
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; EVEX256-NEXT: vzeroupper
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; EVEX256-NEXT: retq
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;
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; EVEX512-LABEL: PR90356:
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; EVEX512: # %bb.0:
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; EVEX512-NEXT: vpsllw $7, %xmm0, %xmm0
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; EVEX512-NEXT: vpmovb2m %xmm0, %k0
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; EVEX512-NEXT: vpmovm2w %k0, %ymm0
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; EVEX512-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; EVEX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]
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; EVEX512-NEXT: vpmovw2m %ymm0, %k0
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; EVEX512-NEXT: kmovd %k0, %eax
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; EVEX512-NEXT: # kill: def $ax killed $ax killed $eax
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; EVEX512-NEXT: vzeroupper
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; EVEX512-NEXT: retq
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%1 = shufflevector <16 x i1> %a, <16 x i1> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
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%2 = bitcast <16 x i1> %1 to i16
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ret i16 %2
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}

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