2929#include " llvm/IR/Intrinsics.h"
3030#include " llvm/IR/PatternMatch.h"
3131
32+ #define LV_NAME " loop-vectorize"
33+ #define DEBUG_TYPE LV_NAME
34+
3235using namespace llvm ;
3336
3437void VPlanTransforms::VPInstructionsToVPRecipes (
@@ -1674,25 +1677,24 @@ static bool supportedLoad(VPWidenRecipe *R0, VPValue *V, unsigned Idx) {
16741677 return false ;
16751678}
16761679
1677- // / Returns true of \p IR is a consecutive interleave group with \p VF members.
1680+ // / Returns true if \p IR is a full interleave group with factor and number of
1681+ // / members both equal to \p VF.
16781682static bool isConsecutiveInterleaveGroup (VPInterleaveRecipe *IR,
16791683 ElementCount VF) {
16801684 if (!IR)
16811685 return false ;
16821686 auto IG = IR->getInterleaveGroup ();
16831687 return IG->getFactor () == IG->getNumMembers () &&
1684- IG->getNumMembers () == VF.getKnownMinValue ();
1688+ IG->getNumMembers () == VF.getFixedValue ();
16851689}
16861690
1687- bool VPlanTransforms::narrowInterleaveGroups (VPlan &Plan, ElementCount VF) {
1691+ void VPlanTransforms::narrowInterleaveGroups (VPlan &Plan, ElementCount VF) {
16881692 using namespace llvm ::VPlanPatternMatch;
16891693 if (VF.isScalable ())
1690- return false ;
1694+ return ;
16911695
1692- bool Changed = false ;
16931696 SmallVector<VPInterleaveRecipe *> StoreGroups;
1694- for (auto &R : make_early_inc_range (
1695- *Plan.getVectorLoopRegion ()->getEntryBasicBlock ())) {
1697+ for (auto &R : *Plan.getVectorLoopRegion ()->getEntryBasicBlock ()) {
16961698 if (match (&R, m_BranchOnCount (m_VPValue (), m_VPValue ())) ||
16971699 isa<VPCanonicalIVPHIRecipe>(&R))
16981700 continue ;
@@ -1701,38 +1703,43 @@ bool VPlanTransforms::narrowInterleaveGroups(VPlan &Plan, ElementCount VF) {
17011703 // * phi recipes other than the canonical induction
17021704 // * recipes writing to memory except interleave groups
17031705 // Only support plans with a canonical induction phi.
1704- if ((R.isPhi () && !isa<VPCanonicalIVPHIRecipe>(&R)) ||
1705- (R.mayWriteToMemory () && !isa<VPInterleaveRecipe>(&R)))
1706- return false ;
1706+ if (R.isPhi ())
1707+ return ;
17071708
17081709 auto *IR = dyn_cast<VPInterleaveRecipe>(&R);
1710+ if (R.mayWriteToMemory () && !IR)
1711+ return ;
1712+
17091713 if (!IR)
17101714 continue ;
17111715
17121716 if (!isConsecutiveInterleaveGroup (IR, VF))
1713- return false ;
1717+ return ;
17141718 if (IR->getStoredValues ().empty ())
17151719 continue ;
17161720
17171721 auto *Lane0 = dyn_cast_or_null<VPWidenRecipe>(
17181722 IR->getStoredValues ()[0 ]->getDefiningRecipe ());
17191723 if (!Lane0)
1720- return false ;
1724+ return ;
17211725 for (const auto &[I, V] : enumerate(IR->getStoredValues ())) {
17221726 auto *R = dyn_cast<VPWidenRecipe>(V->getDefiningRecipe ());
17231727 if (!R || R->getOpcode () != Lane0->getOpcode ())
1724- return false ;
1728+ return ;
17251729 // Work around captured structured bindings being a C++20 extension.
17261730 auto Idx = I;
17271731 if (any_of (R->operands (), [Lane0, Idx](VPValue *V) {
17281732 return !supportedLoad (Lane0, V, Idx);
17291733 }))
1730- return false ;
1734+ return ;
17311735 }
17321736
17331737 StoreGroups.push_back (IR);
17341738 }
17351739
1740+ if (StoreGroups.empty ())
1741+ return ;
1742+
17361743 // Narrow operation tree rooted at store groups.
17371744 for (auto *StoreGroup : StoreGroups) {
17381745 auto *Lane0 = cast<VPWidenRecipe>(
@@ -1769,18 +1776,14 @@ bool VPlanTransforms::narrowInterleaveGroups(VPlan &Plan, ElementCount VF) {
17691776 StoreGroup->getDebugLoc ());
17701777 S->insertBefore (StoreGroup);
17711778 StoreGroup->eraseFromParent ();
1772- Changed = true ;
17731779 }
17741780
1775- if (!Changed)
1776- return false ;
1777-
17781781 // Adjust induction to reflect that the transformed plan only processes one
17791782 // original iteration.
17801783 auto *CanIV = Plan.getCanonicalIV ();
17811784 VPInstruction *Inc = cast<VPInstruction>(CanIV->getBackedgeValue ());
17821785 Inc->setOperand (
17831786 1 , Plan.getOrAddLiveIn (ConstantInt::get (CanIV->getScalarType (), 1 )));
17841787 removeDeadRecipes (Plan);
1785- return true ;
1788+ LLVM_DEBUG ( dbgs () << " Narrowed interleave \n " ) ;
17861789}
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