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[InstCombine] Tests for the fold A < 0 Pred i1
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2 files changed

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‎llvm/test/Transforms/InstCombine/icmp-shr.ll‎

Lines changed: 78 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1589,3 +1589,81 @@ define i1 @exactly_one_set_signbit_wrong_shamt_signed(i8 %x, i8 %y) {
15891589
%r = icmp eq i8 %xsign, %yposz
15901590
ret i1 %r
15911591
}
1592+
1593+
define i1 @slt_zero_ult_i1(i32 %a, i1 %b) {
1594+
; CHECK-LABEL: @slt_zero_ult_i1(
1595+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1596+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
1597+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1598+
; CHECK-NEXT: ret i1 [[CMP2]]
1599+
;
1600+
%conv = zext i1 %b to i32
1601+
%cmp1 = lshr i32 %a, 31
1602+
%cmp2 = icmp ult i32 %conv, %cmp1
1603+
ret i1 %cmp2
1604+
}
1605+
1606+
define i1 @slt_zero_ult_i1_fail1(i32 %a, i1 %b) {
1607+
; CHECK-LABEL: @slt_zero_ult_i1_fail1(
1608+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1609+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 30
1610+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1611+
; CHECK-NEXT: ret i1 [[CMP2]]
1612+
;
1613+
%conv = zext i1 %b to i32
1614+
%cmp1 = lshr i32 %a, 30
1615+
%cmp2 = icmp ult i32 %conv, %cmp1
1616+
ret i1 %cmp2
1617+
}
1618+
1619+
define i1 @slt_zero_ult_i1_fail2(i32 %a, i1 %b) {
1620+
; CHECK-LABEL: @slt_zero_ult_i1_fail2(
1621+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1622+
; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A:%.*]], 31
1623+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1624+
; CHECK-NEXT: ret i1 [[CMP2]]
1625+
;
1626+
%conv = zext i1 %b to i32
1627+
%cmp1 = ashr i32 %a, 31
1628+
%cmp2 = icmp ult i32 %conv, %cmp1
1629+
ret i1 %cmp2
1630+
}
1631+
1632+
define i1 @slt_zero_slt_i1_fail(i32 %a, i1 %b) {
1633+
; CHECK-LABEL: @slt_zero_slt_i1_fail(
1634+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
1635+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
1636+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[CMP1]], [[CONV]]
1637+
; CHECK-NEXT: ret i1 [[CMP2]]
1638+
;
1639+
%conv = zext i1 %b to i32
1640+
%cmp1 = lshr i32 %a, 31
1641+
%cmp2 = icmp slt i32 %conv, %cmp1
1642+
ret i1 %cmp2
1643+
}
1644+
1645+
define i1 @slt_zero_eq_i1_signed(i32 %a, i1 %b) {
1646+
; CHECK-LABEL: @slt_zero_eq_i1_signed(
1647+
; CHECK-NEXT: [[CONV:%.*]] = sext i1 [[B:%.*]] to i32
1648+
; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A:%.*]], 31
1649+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
1650+
; CHECK-NEXT: ret i1 [[CMP2]]
1651+
;
1652+
%conv = sext i1 %b to i32
1653+
%cmp1 = ashr i32 %a, 31
1654+
%cmp2 = icmp eq i32 %conv, %cmp1
1655+
ret i1 %cmp2
1656+
}
1657+
1658+
define i1 @slt_zero_eq_i1_fail_signed(i32 %a, i1 %b) {
1659+
; CHECK-LABEL: @slt_zero_eq_i1_fail_signed(
1660+
; CHECK-NEXT: [[CONV:%.*]] = sext i1 [[B:%.*]] to i32
1661+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
1662+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
1663+
; CHECK-NEXT: ret i1 [[CMP2]]
1664+
;
1665+
%conv = sext i1 %b to i32
1666+
%cmp1 = lshr i32 %a, 31
1667+
%cmp2 = icmp eq i32 %conv, %cmp1
1668+
ret i1 %cmp2
1669+
}

‎llvm/test/Transforms/InstCombine/icmp-xor-signbit.ll‎

Lines changed: 115 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -217,3 +217,118 @@ define <2 x i1> @negative_simplify_splat(<4 x i8> %x) {
217217
ret <2 x i1> %c
218218
}
219219

220+
define i1 @slt_zero_eq_i1(i32 %a, i1 %b) {
221+
; CHECK-LABEL: @slt_zero_eq_i1(
222+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
223+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A:%.*]], 31
224+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
225+
; CHECK-NEXT: ret i1 [[CMP2]]
226+
;
227+
%conv = zext i1 %b to i32
228+
%cmp1 = lshr i32 %a, 31
229+
%cmp2 = icmp eq i32 %conv, %cmp1
230+
ret i1 %cmp2
231+
}
232+
233+
define i1 @slt_zero_eq_i1_fail(i32 %a, i1 %b) {
234+
; CHECK-LABEL: @slt_zero_eq_i1_fail(
235+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[B:%.*]] to i32
236+
; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A:%.*]], 31
237+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
238+
; CHECK-NEXT: ret i1 [[CMP2]]
239+
;
240+
%conv = zext i1 %b to i32
241+
%cmp1 = ashr i32 %a, 31
242+
%cmp2 = icmp eq i32 %conv, %cmp1
243+
ret i1 %cmp2
244+
}
245+
246+
define i1 @slt_zero_eq_ne_0(i32 %a) {
247+
; CHECK-LABEL: @slt_zero_eq_ne_0(
248+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
249+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
250+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
251+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
252+
; CHECK-NEXT: ret i1 [[CMP2]]
253+
;
254+
%cmp = icmp ne i32 %a, 0
255+
%conv = zext i1 %cmp to i32
256+
%cmp1 = lshr i32 %a, 31
257+
%cmp2 = icmp eq i32 %conv, %cmp1
258+
ret i1 %cmp2
259+
}
260+
261+
define i1 @slt_zero_ne_ne_0(i32 %a) {
262+
; CHECK-LABEL: @slt_zero_ne_ne_0(
263+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
264+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
265+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
266+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
267+
; CHECK-NEXT: ret i1 [[CMP2]]
268+
;
269+
%cmp = icmp ne i32 %a, 0
270+
%conv = zext i1 %cmp to i32
271+
%cmp1 = lshr i32 %a, 31
272+
%cmp2 = icmp ne i32 %conv, %cmp1
273+
ret i1 %cmp2
274+
}
275+
276+
define <4 x i1> @slt_zero_eq_ne_0_vec(<4 x i32> %a) {
277+
; CHECK-LABEL: @slt_zero_eq_ne_0_vec(
278+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <4 x i32> [[A:%.*]], zeroinitializer
279+
; CHECK-NEXT: [[CONV:%.*]] = zext <4 x i1> [[CMP]] to <4 x i32>
280+
; CHECK-NEXT: [[CMP1:%.*]] = lshr <4 x i32> [[A]], <i32 31, i32 31, i32 31, i32 31>
281+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq <4 x i32> [[CMP1]], [[CONV]]
282+
; CHECK-NEXT: ret <4 x i1> [[CMP2]]
283+
;
284+
%cmp = icmp ne <4 x i32> %a, zeroinitializer
285+
%conv = zext <4 x i1> %cmp to <4 x i32>
286+
%cmp1 = lshr <4 x i32> %a, <i32 31, i32 31, i32 31, i32 31>
287+
%cmp2 = icmp eq <4 x i32> %conv, %cmp1
288+
ret <4 x i1> %cmp2
289+
}
290+
291+
define i1 @slt_zero_ne_ne_b(i32 %a, i32 %b) {
292+
; CHECK-LABEL: @slt_zero_ne_ne_b(
293+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
294+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
295+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 31
296+
; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[CMP1]], [[CONV]]
297+
; CHECK-NEXT: ret i1 [[CMP2]]
298+
;
299+
%cmp = icmp ne i32 %a, %b
300+
%conv = zext i1 %cmp to i32
301+
%cmp1 = lshr i32 %a, 31
302+
%cmp2 = icmp ne i32 %conv, %cmp1
303+
ret i1 %cmp2
304+
}
305+
306+
define i1 @slt_zero_eq_ne_0_fail1(i32 %a) {
307+
; CHECK-LABEL: @slt_zero_eq_ne_0_fail1(
308+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
309+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
310+
; CHECK-NEXT: [[CMP1:%.*]] = ashr i32 [[A]], 31
311+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
312+
; CHECK-NEXT: ret i1 [[CMP2]]
313+
;
314+
%cmp = icmp ne i32 %a, 0
315+
%conv = zext i1 %cmp to i32
316+
%cmp1 = ashr i32 %a, 31
317+
%cmp2 = icmp eq i32 %conv, %cmp1
318+
ret i1 %cmp2
319+
}
320+
321+
define i1 @slt_zero_eq_ne_0_fail2(i32 %a) {
322+
; CHECK-LABEL: @slt_zero_eq_ne_0_fail2(
323+
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[A:%.*]], 0
324+
; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
325+
; CHECK-NEXT: [[CMP1:%.*]] = lshr i32 [[A]], 30
326+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[CMP1]], [[CONV]]
327+
; CHECK-NEXT: ret i1 [[CMP2]]
328+
;
329+
%cmp = icmp ne i32 %a, 0
330+
%conv = zext i1 %cmp to i32
331+
%cmp1 = lshr i32 %a, 30
332+
%cmp2 = icmp eq i32 %conv, %cmp1
333+
ret i1 %cmp2
334+
}

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