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[LoongArch][NFC] Pre-commit tests for vector ceil,floor,trunc,roundeven
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefix=CHECK
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefix=CHECK
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;; ceilf
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define void @ceil_v8f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: ceil_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4
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; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrp.s $vr2, $vr2
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 48
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0
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; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0
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; CHECK-NEXT: vfrintrp.s $vr3, $vr3
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrp.s $vr0, $vr0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2
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; CHECK-NEXT: xvst $xr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %a0
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%r = call <8 x float> @llvm.ceil.v8f32(<8 x float> %v0)
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store <8 x float> %r, ptr %res
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ret void
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}
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;; ceil
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define void @ceil_v4f64(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: ceil_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2
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; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrp.d $vr2, $vr2
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; CHECK-NEXT: vextrins.d $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrp.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrp.d $vr0, $vr0
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; CHECK-NEXT: vextrins.d $vr0, $vr1, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %a0
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%r = call <4 x double> @llvm.ceil.v4f64(<4 x double> %v0)
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store <4 x double> %r, ptr %res
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ret void
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}
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;; floorf
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define void @floor_v8f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: floor_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4
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; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrm.s $vr2, $vr2
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 48
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0
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; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0
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; CHECK-NEXT: vfrintrm.s $vr3, $vr3
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrm.s $vr0, $vr0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2
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; CHECK-NEXT: xvst $xr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %a0
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%r = call <8 x float> @llvm.floor.v8f32(<8 x float> %v0)
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store <8 x float> %r, ptr %res
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ret void
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}
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;; floor
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define void @floor_v4f64(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: floor_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2
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; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrm.d $vr2, $vr2
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; CHECK-NEXT: vextrins.d $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrm.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrm.d $vr0, $vr0
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; CHECK-NEXT: vextrins.d $vr0, $vr1, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %a0
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%r = call <4 x double> @llvm.floor.v4f64(<4 x double> %v0)
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store <4 x double> %r, ptr %res
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ret void
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}
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;; truncf
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define void @trunc_v8f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: trunc_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4
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; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrz.s $vr2, $vr2
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 48
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0
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; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0
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; CHECK-NEXT: vfrintrz.s $vr3, $vr3
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrz.s $vr0, $vr0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2
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; CHECK-NEXT: xvst $xr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %a0
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%r = call <8 x float> @llvm.trunc.v8f32(<8 x float> %v0)
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store <8 x float> %r, ptr %res
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ret void
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}
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;; trunc
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define void @trunc_v4f64(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: trunc_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2
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; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrz.d $vr2, $vr2
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; CHECK-NEXT: vextrins.d $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrz.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrz.d $vr0, $vr0
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; CHECK-NEXT: vextrins.d $vr0, $vr1, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %a0
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%r = call <4 x double> @llvm.trunc.v4f64(<4 x double> %v0)
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store <4 x double> %r, ptr %res
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ret void
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}
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;; roundevenf
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define void @roundeven_v8f32(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: roundeven_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4
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; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrne.s $vr2, $vr2
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr2, $vr1, 48
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.s $vr1, $vr1
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; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0
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; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0
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; CHECK-NEXT: vfrintrne.s $vr3, $vr3
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 16
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; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2
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; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.s $vr1, $vr1
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; CHECK-NEXT: vextrins.w $vr3, $vr1, 32
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; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
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; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrne.s $vr0, $vr0
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; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
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; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2
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; CHECK-NEXT: xvst $xr3, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <8 x float>, ptr %a0
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%r = call <8 x float> @llvm.roundeven.v8f32(<8 x float> %v0)
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store <8 x float> %r, ptr %res
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ret void
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}
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;; roundeven
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define void @roundeven_v4f64(ptr %res, ptr %a0) nounwind {
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; CHECK-LABEL: roundeven_v4f64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2
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; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0
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; CHECK-NEXT: vfrintrne.d $vr2, $vr2
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; CHECK-NEXT: vextrins.d $vr2, $vr1, 16
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; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1
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; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
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; CHECK-NEXT: vfrintrne.d $vr1, $vr1
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; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: vfrintrne.d $vr0, $vr0
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; CHECK-NEXT: vextrins.d $vr0, $vr1, 16
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; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%v0 = load <4 x double>, ptr %a0
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%r = call <4 x double> @llvm.roundeven.v4f64(<4 x double> %v0)
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store <4 x double> %r, ptr %res
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ret void
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}
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declare <8 x float> @llvm.ceil.v8f32(<8 x float>)
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declare <4 x double> @llvm.ceil.v4f64(<4 x double>)
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declare <8 x float> @llvm.floor.v8f32(<8 x float>)
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declare <4 x double> @llvm.floor.v4f64(<4 x double>)
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declare <8 x float> @llvm.trunc.v8f32(<8 x float>)
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declare <4 x double> @llvm.trunc.v4f64(<4 x double>)
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declare <8 x float> @llvm.roundeven.v8f32(<8 x float>)
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declare <4 x double> @llvm.roundeven.v4f64(<4 x double>)

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