|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefix=CHECK |
| 3 | +; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefix=CHECK |
| 4 | + |
| 5 | +;; ceilf |
| 6 | +define void @ceil_v8f32(ptr %res, ptr %a0) nounwind { |
| 7 | +; CHECK-LABEL: ceil_v8f32: |
| 8 | +; CHECK: # %bb.0: # %entry |
| 9 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 10 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5 |
| 11 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 12 | +; CHECK-NEXT: vfrintrp.s $vr1, $vr1 |
| 13 | +; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4 |
| 14 | +; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0 |
| 15 | +; CHECK-NEXT: vfrintrp.s $vr2, $vr2 |
| 16 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 16 |
| 17 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6 |
| 18 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 19 | +; CHECK-NEXT: vfrintrp.s $vr1, $vr1 |
| 20 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 32 |
| 21 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7 |
| 22 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 23 | +; CHECK-NEXT: vfrintrp.s $vr1, $vr1 |
| 24 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 48 |
| 25 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1 |
| 26 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 27 | +; CHECK-NEXT: vfrintrp.s $vr1, $vr1 |
| 28 | +; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0 |
| 29 | +; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0 |
| 30 | +; CHECK-NEXT: vfrintrp.s $vr3, $vr3 |
| 31 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 16 |
| 32 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2 |
| 33 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 34 | +; CHECK-NEXT: vfrintrp.s $vr1, $vr1 |
| 35 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 32 |
| 36 | +; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3 |
| 37 | +; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0 |
| 38 | +; CHECK-NEXT: vfrintrp.s $vr0, $vr0 |
| 39 | +; CHECK-NEXT: vextrins.w $vr3, $vr0, 48 |
| 40 | +; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2 |
| 41 | +; CHECK-NEXT: xvst $xr3, $a0, 0 |
| 42 | +; CHECK-NEXT: ret |
| 43 | +entry: |
| 44 | + %v0 = load <8 x float>, ptr %a0 |
| 45 | + %r = call <8 x float> @llvm.ceil.v8f32(<8 x float> %v0) |
| 46 | + store <8 x float> %r, ptr %res |
| 47 | + ret void |
| 48 | +} |
| 49 | + |
| 50 | +;; ceil |
| 51 | +define void @ceil_v4f64(ptr %res, ptr %a0) nounwind { |
| 52 | +; CHECK-LABEL: ceil_v4f64: |
| 53 | +; CHECK: # %bb.0: # %entry |
| 54 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 55 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3 |
| 56 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 57 | +; CHECK-NEXT: vfrintrp.d $vr1, $vr1 |
| 58 | +; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2 |
| 59 | +; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0 |
| 60 | +; CHECK-NEXT: vfrintrp.d $vr2, $vr2 |
| 61 | +; CHECK-NEXT: vextrins.d $vr2, $vr1, 16 |
| 62 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1 |
| 63 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 64 | +; CHECK-NEXT: vfrintrp.d $vr1, $vr1 |
| 65 | +; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0 |
| 66 | +; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0 |
| 67 | +; CHECK-NEXT: vfrintrp.d $vr0, $vr0 |
| 68 | +; CHECK-NEXT: vextrins.d $vr0, $vr1, 16 |
| 69 | +; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2 |
| 70 | +; CHECK-NEXT: xvst $xr0, $a0, 0 |
| 71 | +; CHECK-NEXT: ret |
| 72 | +entry: |
| 73 | + %v0 = load <4 x double>, ptr %a0 |
| 74 | + %r = call <4 x double> @llvm.ceil.v4f64(<4 x double> %v0) |
| 75 | + store <4 x double> %r, ptr %res |
| 76 | + ret void |
| 77 | +} |
| 78 | + |
| 79 | +;; floorf |
| 80 | +define void @floor_v8f32(ptr %res, ptr %a0) nounwind { |
| 81 | +; CHECK-LABEL: floor_v8f32: |
| 82 | +; CHECK: # %bb.0: # %entry |
| 83 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 84 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5 |
| 85 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 86 | +; CHECK-NEXT: vfrintrm.s $vr1, $vr1 |
| 87 | +; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4 |
| 88 | +; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0 |
| 89 | +; CHECK-NEXT: vfrintrm.s $vr2, $vr2 |
| 90 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 16 |
| 91 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6 |
| 92 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 93 | +; CHECK-NEXT: vfrintrm.s $vr1, $vr1 |
| 94 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 32 |
| 95 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7 |
| 96 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 97 | +; CHECK-NEXT: vfrintrm.s $vr1, $vr1 |
| 98 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 48 |
| 99 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1 |
| 100 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 101 | +; CHECK-NEXT: vfrintrm.s $vr1, $vr1 |
| 102 | +; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0 |
| 103 | +; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0 |
| 104 | +; CHECK-NEXT: vfrintrm.s $vr3, $vr3 |
| 105 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 16 |
| 106 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2 |
| 107 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 108 | +; CHECK-NEXT: vfrintrm.s $vr1, $vr1 |
| 109 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 32 |
| 110 | +; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3 |
| 111 | +; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0 |
| 112 | +; CHECK-NEXT: vfrintrm.s $vr0, $vr0 |
| 113 | +; CHECK-NEXT: vextrins.w $vr3, $vr0, 48 |
| 114 | +; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2 |
| 115 | +; CHECK-NEXT: xvst $xr3, $a0, 0 |
| 116 | +; CHECK-NEXT: ret |
| 117 | +entry: |
| 118 | + %v0 = load <8 x float>, ptr %a0 |
| 119 | + %r = call <8 x float> @llvm.floor.v8f32(<8 x float> %v0) |
| 120 | + store <8 x float> %r, ptr %res |
| 121 | + ret void |
| 122 | +} |
| 123 | + |
| 124 | +;; floor |
| 125 | +define void @floor_v4f64(ptr %res, ptr %a0) nounwind { |
| 126 | +; CHECK-LABEL: floor_v4f64: |
| 127 | +; CHECK: # %bb.0: # %entry |
| 128 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 129 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3 |
| 130 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 131 | +; CHECK-NEXT: vfrintrm.d $vr1, $vr1 |
| 132 | +; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2 |
| 133 | +; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0 |
| 134 | +; CHECK-NEXT: vfrintrm.d $vr2, $vr2 |
| 135 | +; CHECK-NEXT: vextrins.d $vr2, $vr1, 16 |
| 136 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1 |
| 137 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 138 | +; CHECK-NEXT: vfrintrm.d $vr1, $vr1 |
| 139 | +; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0 |
| 140 | +; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0 |
| 141 | +; CHECK-NEXT: vfrintrm.d $vr0, $vr0 |
| 142 | +; CHECK-NEXT: vextrins.d $vr0, $vr1, 16 |
| 143 | +; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2 |
| 144 | +; CHECK-NEXT: xvst $xr0, $a0, 0 |
| 145 | +; CHECK-NEXT: ret |
| 146 | +entry: |
| 147 | + %v0 = load <4 x double>, ptr %a0 |
| 148 | + %r = call <4 x double> @llvm.floor.v4f64(<4 x double> %v0) |
| 149 | + store <4 x double> %r, ptr %res |
| 150 | + ret void |
| 151 | +} |
| 152 | + |
| 153 | +;; truncf |
| 154 | +define void @trunc_v8f32(ptr %res, ptr %a0) nounwind { |
| 155 | +; CHECK-LABEL: trunc_v8f32: |
| 156 | +; CHECK: # %bb.0: # %entry |
| 157 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 158 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5 |
| 159 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 160 | +; CHECK-NEXT: vfrintrz.s $vr1, $vr1 |
| 161 | +; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4 |
| 162 | +; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0 |
| 163 | +; CHECK-NEXT: vfrintrz.s $vr2, $vr2 |
| 164 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 16 |
| 165 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6 |
| 166 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 167 | +; CHECK-NEXT: vfrintrz.s $vr1, $vr1 |
| 168 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 32 |
| 169 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7 |
| 170 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 171 | +; CHECK-NEXT: vfrintrz.s $vr1, $vr1 |
| 172 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 48 |
| 173 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1 |
| 174 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 175 | +; CHECK-NEXT: vfrintrz.s $vr1, $vr1 |
| 176 | +; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0 |
| 177 | +; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0 |
| 178 | +; CHECK-NEXT: vfrintrz.s $vr3, $vr3 |
| 179 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 16 |
| 180 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2 |
| 181 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 182 | +; CHECK-NEXT: vfrintrz.s $vr1, $vr1 |
| 183 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 32 |
| 184 | +; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3 |
| 185 | +; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0 |
| 186 | +; CHECK-NEXT: vfrintrz.s $vr0, $vr0 |
| 187 | +; CHECK-NEXT: vextrins.w $vr3, $vr0, 48 |
| 188 | +; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2 |
| 189 | +; CHECK-NEXT: xvst $xr3, $a0, 0 |
| 190 | +; CHECK-NEXT: ret |
| 191 | +entry: |
| 192 | + %v0 = load <8 x float>, ptr %a0 |
| 193 | + %r = call <8 x float> @llvm.trunc.v8f32(<8 x float> %v0) |
| 194 | + store <8 x float> %r, ptr %res |
| 195 | + ret void |
| 196 | +} |
| 197 | + |
| 198 | +;; trunc |
| 199 | +define void @trunc_v4f64(ptr %res, ptr %a0) nounwind { |
| 200 | +; CHECK-LABEL: trunc_v4f64: |
| 201 | +; CHECK: # %bb.0: # %entry |
| 202 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 203 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3 |
| 204 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 205 | +; CHECK-NEXT: vfrintrz.d $vr1, $vr1 |
| 206 | +; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2 |
| 207 | +; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0 |
| 208 | +; CHECK-NEXT: vfrintrz.d $vr2, $vr2 |
| 209 | +; CHECK-NEXT: vextrins.d $vr2, $vr1, 16 |
| 210 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1 |
| 211 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 212 | +; CHECK-NEXT: vfrintrz.d $vr1, $vr1 |
| 213 | +; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0 |
| 214 | +; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0 |
| 215 | +; CHECK-NEXT: vfrintrz.d $vr0, $vr0 |
| 216 | +; CHECK-NEXT: vextrins.d $vr0, $vr1, 16 |
| 217 | +; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2 |
| 218 | +; CHECK-NEXT: xvst $xr0, $a0, 0 |
| 219 | +; CHECK-NEXT: ret |
| 220 | +entry: |
| 221 | + %v0 = load <4 x double>, ptr %a0 |
| 222 | + %r = call <4 x double> @llvm.trunc.v4f64(<4 x double> %v0) |
| 223 | + store <4 x double> %r, ptr %res |
| 224 | + ret void |
| 225 | +} |
| 226 | + |
| 227 | +;; roundevenf |
| 228 | +define void @roundeven_v8f32(ptr %res, ptr %a0) nounwind { |
| 229 | +; CHECK-LABEL: roundeven_v8f32: |
| 230 | +; CHECK: # %bb.0: # %entry |
| 231 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 232 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 5 |
| 233 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 234 | +; CHECK-NEXT: vfrintrne.s $vr1, $vr1 |
| 235 | +; CHECK-NEXT: xvpickve.w $xr2, $xr0, 4 |
| 236 | +; CHECK-NEXT: vreplvei.w $vr2, $vr2, 0 |
| 237 | +; CHECK-NEXT: vfrintrne.s $vr2, $vr2 |
| 238 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 16 |
| 239 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 6 |
| 240 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 241 | +; CHECK-NEXT: vfrintrne.s $vr1, $vr1 |
| 242 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 32 |
| 243 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 7 |
| 244 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 245 | +; CHECK-NEXT: vfrintrne.s $vr1, $vr1 |
| 246 | +; CHECK-NEXT: vextrins.w $vr2, $vr1, 48 |
| 247 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 1 |
| 248 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 249 | +; CHECK-NEXT: vfrintrne.s $vr1, $vr1 |
| 250 | +; CHECK-NEXT: xvpickve.w $xr3, $xr0, 0 |
| 251 | +; CHECK-NEXT: vreplvei.w $vr3, $vr3, 0 |
| 252 | +; CHECK-NEXT: vfrintrne.s $vr3, $vr3 |
| 253 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 16 |
| 254 | +; CHECK-NEXT: xvpickve.w $xr1, $xr0, 2 |
| 255 | +; CHECK-NEXT: vreplvei.w $vr1, $vr1, 0 |
| 256 | +; CHECK-NEXT: vfrintrne.s $vr1, $vr1 |
| 257 | +; CHECK-NEXT: vextrins.w $vr3, $vr1, 32 |
| 258 | +; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3 |
| 259 | +; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0 |
| 260 | +; CHECK-NEXT: vfrintrne.s $vr0, $vr0 |
| 261 | +; CHECK-NEXT: vextrins.w $vr3, $vr0, 48 |
| 262 | +; CHECK-NEXT: xvpermi.q $xr3, $xr2, 2 |
| 263 | +; CHECK-NEXT: xvst $xr3, $a0, 0 |
| 264 | +; CHECK-NEXT: ret |
| 265 | +entry: |
| 266 | + %v0 = load <8 x float>, ptr %a0 |
| 267 | + %r = call <8 x float> @llvm.roundeven.v8f32(<8 x float> %v0) |
| 268 | + store <8 x float> %r, ptr %res |
| 269 | + ret void |
| 270 | +} |
| 271 | + |
| 272 | +;; roundeven |
| 273 | +define void @roundeven_v4f64(ptr %res, ptr %a0) nounwind { |
| 274 | +; CHECK-LABEL: roundeven_v4f64: |
| 275 | +; CHECK: # %bb.0: # %entry |
| 276 | +; CHECK-NEXT: xvld $xr0, $a1, 0 |
| 277 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 3 |
| 278 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 279 | +; CHECK-NEXT: vfrintrne.d $vr1, $vr1 |
| 280 | +; CHECK-NEXT: xvpickve.d $xr2, $xr0, 2 |
| 281 | +; CHECK-NEXT: vreplvei.d $vr2, $vr2, 0 |
| 282 | +; CHECK-NEXT: vfrintrne.d $vr2, $vr2 |
| 283 | +; CHECK-NEXT: vextrins.d $vr2, $vr1, 16 |
| 284 | +; CHECK-NEXT: xvpickve.d $xr1, $xr0, 1 |
| 285 | +; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0 |
| 286 | +; CHECK-NEXT: vfrintrne.d $vr1, $vr1 |
| 287 | +; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0 |
| 288 | +; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0 |
| 289 | +; CHECK-NEXT: vfrintrne.d $vr0, $vr0 |
| 290 | +; CHECK-NEXT: vextrins.d $vr0, $vr1, 16 |
| 291 | +; CHECK-NEXT: xvpermi.q $xr0, $xr2, 2 |
| 292 | +; CHECK-NEXT: xvst $xr0, $a0, 0 |
| 293 | +; CHECK-NEXT: ret |
| 294 | +entry: |
| 295 | + %v0 = load <4 x double>, ptr %a0 |
| 296 | + %r = call <4 x double> @llvm.roundeven.v4f64(<4 x double> %v0) |
| 297 | + store <4 x double> %r, ptr %res |
| 298 | + ret void |
| 299 | +} |
| 300 | + |
| 301 | +declare <8 x float> @llvm.ceil.v8f32(<8 x float>) |
| 302 | +declare <4 x double> @llvm.ceil.v4f64(<4 x double>) |
| 303 | +declare <8 x float> @llvm.floor.v8f32(<8 x float>) |
| 304 | +declare <4 x double> @llvm.floor.v4f64(<4 x double>) |
| 305 | +declare <8 x float> @llvm.trunc.v8f32(<8 x float>) |
| 306 | +declare <4 x double> @llvm.trunc.v4f64(<4 x double>) |
| 307 | +declare <8 x float> @llvm.roundeven.v8f32(<8 x float>) |
| 308 | +declare <4 x double> @llvm.roundeven.v4f64(<4 x double>) |
0 commit comments