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justinfargnolijustinfargnoli
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Update load-store.ll
1 parent cead73d commit 7a99f23

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-24
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+24
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Diff for: ‎llvm/test/CodeGen/NVPTX/load-store.ll

+24-24
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,7 @@ define void @generic_4xi8(ptr %a) {
175175
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
176176
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
177177
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
178-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
178+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
179179
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
180180
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
181181
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -184,8 +184,8 @@ define void @generic_4xi8(ptr %a) {
184184
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
185185
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
186186
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
187-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
188-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
187+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
188+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
189189
; CHECK-NEXT: st.u32 [%rd1], %r12;
190190
; CHECK-NEXT: ret;
191191
%a.load = load <4 x i8>, ptr %a
@@ -519,7 +519,7 @@ define void @generic_volatile_4xi8(ptr %a) {
519519
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
520520
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
521521
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
522-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
522+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
523523
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
524524
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
525525
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -528,8 +528,8 @@ define void @generic_volatile_4xi8(ptr %a) {
528528
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
529529
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
530530
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
531-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
532-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
531+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
532+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
533533
; CHECK-NEXT: st.volatile.u32 [%rd1], %r12;
534534
; CHECK-NEXT: ret;
535535
%a.load = load volatile <4 x i8>, ptr %a
@@ -1424,7 +1424,7 @@ define void @global_4xi8(ptr addrspace(1) %a) {
14241424
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
14251425
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
14261426
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
1427-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
1427+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
14281428
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
14291429
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
14301430
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -1433,8 +1433,8 @@ define void @global_4xi8(ptr addrspace(1) %a) {
14331433
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
14341434
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
14351435
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
1436-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
1437-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
1436+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
1437+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
14381438
; CHECK-NEXT: st.global.u32 [%rd1], %r12;
14391439
; CHECK-NEXT: ret;
14401440
%a.load = load <4 x i8>, ptr addrspace(1) %a
@@ -1749,7 +1749,7 @@ define void @global_volatile_4xi8(ptr addrspace(1) %a) {
17491749
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
17501750
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
17511751
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
1752-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
1752+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
17531753
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
17541754
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
17551755
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -1758,8 +1758,8 @@ define void @global_volatile_4xi8(ptr addrspace(1) %a) {
17581758
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
17591759
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
17601760
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
1761-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
1762-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
1761+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
1762+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
17631763
; CHECK-NEXT: st.volatile.global.u32 [%rd1], %r12;
17641764
; CHECK-NEXT: ret;
17651765
%a.load = load volatile <4 x i8>, ptr addrspace(1) %a
@@ -2796,7 +2796,7 @@ define void @shared_4xi8(ptr addrspace(3) %a) {
27962796
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
27972797
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
27982798
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
2799-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
2799+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
28002800
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
28012801
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
28022802
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -2805,8 +2805,8 @@ define void @shared_4xi8(ptr addrspace(3) %a) {
28052805
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
28062806
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
28072807
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
2808-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
2809-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
2808+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
2809+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
28102810
; CHECK-NEXT: st.shared.u32 [%rd1], %r12;
28112811
; CHECK-NEXT: ret;
28122812
%a.load = load <4 x i8>, ptr addrspace(3) %a
@@ -3121,7 +3121,7 @@ define void @shared_volatile_4xi8(ptr addrspace(3) %a) {
31213121
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
31223122
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
31233123
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
3124-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
3124+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
31253125
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
31263126
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
31273127
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -3130,8 +3130,8 @@ define void @shared_volatile_4xi8(ptr addrspace(3) %a) {
31303130
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
31313131
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
31323132
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
3133-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
3134-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
3133+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
3134+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
31353135
; CHECK-NEXT: st.volatile.shared.u32 [%rd1], %r12;
31363136
; CHECK-NEXT: ret;
31373137
%a.load = load volatile <4 x i8>, ptr addrspace(3) %a
@@ -4026,7 +4026,7 @@ define void @local_4xi8(ptr addrspace(5) %a) {
40264026
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
40274027
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
40284028
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
4029-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
4029+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
40304030
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
40314031
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
40324032
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -4035,8 +4035,8 @@ define void @local_4xi8(ptr addrspace(5) %a) {
40354035
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
40364036
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
40374037
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
4038-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
4039-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
4038+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
4039+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
40404040
; CHECK-NEXT: st.local.u32 [%rd1], %r12;
40414041
; CHECK-NEXT: ret;
40424042
%a.load = load <4 x i8>, ptr addrspace(5) %a
@@ -4351,7 +4351,7 @@ define void @local_volatile_4xi8(ptr addrspace(5) %a) {
43514351
; CHECK-NEXT: cvt.u16.u32 %rs3, %r4;
43524352
; CHECK-NEXT: add.s16 %rs4, %rs3, 1;
43534353
; CHECK-NEXT: cvt.u32.u16 %r5, %rs4;
4354-
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 13120;
4354+
; CHECK-NEXT: prmt.b32 %r6, %r5, %r3, 0x3340U;
43554355
; CHECK-NEXT: bfe.u32 %r7, %r1, 8, 8;
43564356
; CHECK-NEXT: cvt.u16.u32 %rs5, %r7;
43574357
; CHECK-NEXT: add.s16 %rs6, %rs5, 1;
@@ -4360,8 +4360,8 @@ define void @local_volatile_4xi8(ptr addrspace(5) %a) {
43604360
; CHECK-NEXT: cvt.u16.u32 %rs7, %r9;
43614361
; CHECK-NEXT: add.s16 %rs8, %rs7, 1;
43624362
; CHECK-NEXT: cvt.u32.u16 %r10, %rs8;
4363-
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 13120;
4364-
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 21520;
4363+
; CHECK-NEXT: prmt.b32 %r11, %r10, %r8, 0x3340U;
4364+
; CHECK-NEXT: prmt.b32 %r12, %r11, %r6, 0x5410U;
43654365
; CHECK-NEXT: st.local.u32 [%rd1], %r12;
43664366
; CHECK-NEXT: ret;
43674367
%a.load = load volatile <4 x i8>, ptr addrspace(5) %a

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