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[X86][MC] Support Enc/Dec for EGPR for promoted CET instruction (#76023)
R16-R31 was added into GPRs in #70958, This patch supports the encoding/decoding for promoted CET instruction in EVEX space. RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
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‎llvm/lib/Target/X86/X86InstrSystem.td

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@@ -520,6 +520,7 @@ let SchedRW = [WriteSystem] in {
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} // Defs SSP
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} // Uses SSP
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let Predicates = [NoEGPR] in {
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def WRSSD : I<0xF6, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"wrssd\t{$src, $dst|$dst, $src}",
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[(int_x86_wrssd GR32:$src, addr:$dst)]>, T8PS;
@@ -532,6 +533,22 @@ let SchedRW = [WriteSystem] in {
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def WRUSSQ : RI<0xF5, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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"wrussq\t{$src, $dst|$dst, $src}",
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[(int_x86_wrussq GR64:$src, addr:$dst)]>, T8PD;
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}
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let Predicates = [HasEGPR, In64BitMode] in {
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def WRSSD_EVEX : I<0x66, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"wrssd\t{$src, $dst|$dst, $src}",
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[(int_x86_wrssd GR32:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PS;
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def WRSSQ_EVEX : RI<0x66, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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"wrssq\t{$src, $dst|$dst, $src}",
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[(int_x86_wrssq GR64:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PS;
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def WRUSSD_EVEX : I<0x65, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"wrussd\t{$src, $dst|$dst, $src}",
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[(int_x86_wrussd GR32:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PD;
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def WRUSSQ_EVEX : RI<0x65, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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"wrussq\t{$src, $dst|$dst, $src}",
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[(int_x86_wrussq GR64:$src, addr:$dst)]>, EVEX, NoCD8, T_MAP4PD;
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}
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let Defs = [SSP] in {
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let Uses = [SSP] in {

‎llvm/test/MC/Disassembler/X86/apx/wrssd.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: wrssd %r18d, 291(%r28,%r29,4)
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# INTEL: wrssd dword ptr [r28 + 4*r29 + 291], r18d
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0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/Disassembler/X86/apx/wrssq.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: wrssq %r19, 291(%r28,%r29,4)
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# INTEL: wrssq qword ptr [r28 + 4*r29 + 291], r19
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0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/Disassembler/X86/apx/wrussd.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: wrussd %r18d, 291(%r28,%r29,4)
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# INTEL: wrussd dword ptr [r28 + 4*r29 + 291], r18d
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0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/Disassembler/X86/apx/wrussq.txt

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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: wrussq %r19, 291(%r28,%r29,4)
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# INTEL: wrussq qword ptr [r28 + 4*r29 + 291], r19
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0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/X86/apx/wrssd-att.s

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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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# ERROR-COUNT-1: error:
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# ERROR-NOT: error:
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# CHECK: wrssd %r18d, 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00]
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wrssd %r18d, 291(%r28,%r29,4)

‎llvm/test/MC/X86/apx/wrssd-intel.s

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# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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# CHECK: wrssd dword ptr [r28 + 4*r29 + 291], r18d
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# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x66,0x94,0xac,0x23,0x01,0x00,0x00]
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wrssd dword ptr [r28 + 4*r29 + 291], r18d

‎llvm/test/MC/X86/apx/wrssq-att.s

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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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# ERROR-COUNT-1: error:
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# ERROR-NOT: error:
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# CHECK: wrssq %r19, 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00]
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wrssq %r19, 291(%r28,%r29,4)

‎llvm/test/MC/X86/apx/wrssq-intel.s

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# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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# CHECK: wrssq qword ptr [r28 + 4*r29 + 291], r19
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# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x66,0x9c,0xac,0x23,0x01,0x00,0x00]
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wrssq qword ptr [r28 + 4*r29 + 291], r19

‎llvm/test/MC/X86/apx/wrussd-att.s

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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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# ERROR-COUNT-1: error:
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# ERROR-NOT: error:
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# CHECK: wrussd %r18d, 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00]
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wrussd %r18d, 291(%r28,%r29,4)

‎llvm/test/MC/X86/apx/wrussd-intel.s

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# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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# CHECK: wrussd dword ptr [r28 + 4*r29 + 291], r18d
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# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x65,0x94,0xac,0x23,0x01,0x00,0x00]
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wrussd dword ptr [r28 + 4*r29 + 291], r18d

‎llvm/test/MC/X86/apx/wrussq-att.s

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# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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# ERROR-COUNT-1: error:
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# ERROR-NOT: error:
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# CHECK: wrussq %r19, 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00]
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wrussq %r19, 291(%r28,%r29,4)

‎llvm/test/MC/X86/apx/wrussq-intel.s

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# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
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# CHECK: wrussq qword ptr [r28 + 4*r29 + 291], r19
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# CHECK: encoding: [0x62,0x8c,0xf9,0x08,0x65,0x9c,0xac,0x23,0x01,0x00,0x00]
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wrussq qword ptr [r28 + 4*r29 + 291], r19

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