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 | 1 | +# RUN: llc  --march=hexagon %s -run-pass=pipeliner -debug-only=pipeliner \  | 
 | 2 | +# RUN: -window-sched=force -filetype=null -verify-machineinstrs 2>&1 \  | 
 | 3 | +# RUN: | FileCheck %s  | 
 | 4 | +# REQUIRES: asserts  | 
 | 5 | + | 
 | 6 | +# Test that checks no window scheduler is performed if the II set by pragma was  | 
 | 7 | +# enabled  | 
 | 8 | + | 
 | 9 | +# CHECK: Window scheduling is disabled when llvm.loop.pipeline.initiationinterval is set.  | 
 | 10 | + | 
 | 11 | +--- |  | 
 | 12 | +  define void @test_pragma_ii_fail(ptr %a0, i32 %a1) {  | 
 | 13 | +  b0:  | 
 | 14 | +    %v0 = icmp sgt i32 %a1, 1  | 
 | 15 | +    br i1 %v0, label %b1, label %b4  | 
 | 16 | + | 
 | 17 | +  b1:                                               ; preds = %b0  | 
 | 18 | +    %v1 = load i32, ptr %a0, align 4  | 
 | 19 | +    %v2 = add i32 %v1, 10  | 
 | 20 | +    %v4 = add i32 %a1, -1  | 
 | 21 | +    %cgep = getelementptr i32, ptr %a0, i32 1  | 
 | 22 | +    br label %b2  | 
 | 23 | + | 
 | 24 | +  b2:                                               ; preds = %b2, %b1  | 
 | 25 | +    %v5 = phi i32 [ %v12, %b2 ], [ %v4, %b1 ]  | 
 | 26 | +    %v6 = phi ptr [ %cgep2, %b2 ], [ %cgep, %b1 ]  | 
 | 27 | +    %v7 = phi i32 [ %v10, %b2 ], [ %v2, %b1 ]  | 
 | 28 | +    store i32 %v7, ptr %v6, align 4  | 
 | 29 | +    %v8 = add i32 %v7, 10  | 
 | 30 | +    %cgep1 = getelementptr i32, ptr %v6, i32 -1  | 
 | 31 | +    store i32 %v8, ptr %cgep1, align 4  | 
 | 32 | +    %v10 = add i32 %v7, 10  | 
 | 33 | +    %v12 = add i32 %v5, -1  | 
 | 34 | +    %v13 = icmp eq i32 %v12, 0  | 
 | 35 | +    %cgep2 = getelementptr i32, ptr %v6, i32 1  | 
 | 36 | +    br i1 %v13, label %b4, label %b2, !llvm.loop !0  | 
 | 37 | + | 
 | 38 | +  b4:                                               ; preds = %b2, %b0  | 
 | 39 | +    ret void  | 
 | 40 | +  }  | 
 | 41 | + | 
 | 42 | +  !0 = distinct !{!0, !1}  | 
 | 43 | +  !1 = !{!"llvm.loop.pipeline.initiationinterval", i32 2}  | 
 | 44 | +...  | 
 | 45 | +---  | 
 | 46 | +name:            test_pragma_ii_fail  | 
 | 47 | +tracksRegLiveness: true  | 
 | 48 | +body:             |  | 
 | 49 | +  bb.0.b0:  | 
 | 50 | +    successors: %bb.1(0x40000000), %bb.3(0x40000000)  | 
 | 51 | +    liveins: $r0, $r1  | 
 | 52 | +    | 
 | 53 | +    %0:intregs = COPY $r1  | 
 | 54 | +    %1:intregs = COPY $r0  | 
 | 55 | +    %2:predregs = C2_cmpgti %0, 1  | 
 | 56 | +    J2_jumpf %2, %bb.3, implicit-def dead $pc  | 
 | 57 | +    J2_jump %bb.1, implicit-def dead $pc  | 
 | 58 | +    | 
 | 59 | +  bb.1.b1:  | 
 | 60 | +    successors: %bb.2(0x80000000)  | 
 | 61 | +    | 
 | 62 | +    %3:intregs, %4:intregs = L2_loadri_pi %1, 4  | 
 | 63 | +    %5:intregs = A2_addi killed %3, 10  | 
 | 64 | +    %6:intregs = A2_addi %0, -1  | 
 | 65 | +    %7:intregs = COPY %6  | 
 | 66 | +    J2_loop0r %bb.2, %7, implicit-def $lc0, implicit-def $sa0, implicit-def $usr  | 
 | 67 | +    | 
 | 68 | +  bb.2.b2 (machine-block-address-taken):  | 
 | 69 | +    successors: %bb.3(0x04000000), %bb.2(0x7c000000)  | 
 | 70 | +    | 
 | 71 | +    %8:intregs = PHI %4, %bb.1, %9, %bb.2  | 
 | 72 | +    %10:intregs = PHI %5, %bb.1, %11, %bb.2  | 
 | 73 | +    S2_storeri_io %8, 0, %10  | 
 | 74 | +    %11:intregs = A2_addi %10, 10  | 
 | 75 | +    S2_storeri_io %8, -4, %11  | 
 | 76 | +    %9:intregs = A2_addi %8, 4  | 
 | 77 | +    ENDLOOP0 %bb.2, implicit-def $pc, implicit-def $lc0, implicit $sa0, implicit $lc0  | 
 | 78 | +    J2_jump %bb.3, implicit-def dead $pc  | 
 | 79 | +    | 
 | 80 | +  bb.3.b4:  | 
 | 81 | +    PS_jmpret $r31, implicit-def dead $pc  | 
 | 82 | +
  | 
 | 83 | +...  | 
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