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[InstCombine] Infer disjoint flag on Or instructions. (#72912)
The disjoint flag was recently added to IR in #72583 We already set it when we turn an add into an or. This patch sets it on Ors that weren't converted from an Add.
1 parent 0801216 commit 7ec4f60

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‎clang/test/Headers/__clang_hip_math.hip

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2451,7 +2451,7 @@ extern "C" __device__ double test_modf(double x, double* y) {
24512451
// CHECK-NEXT: [[RETVAL_0_I_I:%.*]] = phi i64 [ 0, [[CLEANUP_I_I_I]] ], [ [[__R_0_I_I_I]], [[WHILE_COND_I_I_I]] ], [ 0, [[CLEANUP_I36_I_I]] ], [ [[__R_0_I32_I_I]], [[WHILE_COND_I30_I_I]] ], [ 0, [[CLEANUP_I20_I_I]] ], [ [[__R_0_I16_I_I]], [[WHILE_COND_I14_I_I]] ]
24522452
// CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[RETVAL_0_I_I]] to i32
24532453
// CHECK-NEXT: [[BF_VALUE_I:%.*]] = and i32 [[CONV_I]], 4194303
2454-
// CHECK-NEXT: [[BF_SET9_I:%.*]] = or i32 [[BF_VALUE_I]], 2143289344
2454+
// CHECK-NEXT: [[BF_SET9_I:%.*]] = or disjoint i32 [[BF_VALUE_I]], 2143289344
24552455
// CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[BF_SET9_I]] to float
24562456
// CHECK-NEXT: ret float [[TMP10]]
24572457
//
@@ -2549,7 +2549,7 @@ extern "C" __device__ float test_nanf(const char *tag) {
25492549
// CHECK: _ZL3nanPKc.exit:
25502550
// CHECK-NEXT: [[RETVAL_0_I_I:%.*]] = phi i64 [ 0, [[CLEANUP_I_I_I]] ], [ [[__R_0_I_I_I]], [[WHILE_COND_I_I_I]] ], [ 0, [[CLEANUP_I36_I_I]] ], [ [[__R_0_I32_I_I]], [[WHILE_COND_I30_I_I]] ], [ 0, [[CLEANUP_I20_I_I]] ], [ [[__R_0_I16_I_I]], [[WHILE_COND_I14_I_I]] ]
25512551
// CHECK-NEXT: [[BF_VALUE_I:%.*]] = and i64 [[RETVAL_0_I_I]], 2251799813685247
2552-
// CHECK-NEXT: [[BF_SET9_I:%.*]] = or i64 [[BF_VALUE_I]], 9221120237041090560
2552+
// CHECK-NEXT: [[BF_SET9_I:%.*]] = or disjoint i64 [[BF_VALUE_I]], 9221120237041090560
25532553
// CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[BF_SET9_I]] to double
25542554
// CHECK-NEXT: ret double [[TMP10]]
25552555
//

‎llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -264,6 +264,16 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
264264
if (ShrinkDemandedConstant(I, 1, DemandedMask))
265265
return I;
266266

267+
// Infer disjoint flag if no common bits are set.
268+
if (!cast<PossiblyDisjointInst>(I)->isDisjoint()) {
269+
WithCache<const Value *> LHSCache(I->getOperand(0), LHSKnown),
270+
RHSCache(I->getOperand(1), RHSKnown);
271+
if (haveNoCommonBitsSet(LHSCache, RHSCache, SQ.getWithInstruction(I))) {
272+
cast<PossiblyDisjointInst>(I)->setIsDisjoint(true);
273+
return I;
274+
}
275+
}
276+
267277
break;
268278
}
269279
case Instruction::Xor: {

‎llvm/test/Transforms/InstCombine/2010-11-01-lshr-mask.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,9 +33,9 @@ define i8 @foo(i8 %arg, i8 %arg1) {
3333
; CHECK-NEXT: [[T4:%.*]] = and i8 [[ARG1]], 33
3434
; CHECK-NEXT: [[T5:%.*]] = sub nsw i8 40, [[T2]]
3535
; CHECK-NEXT: [[T6:%.*]] = and i8 [[T5]], 84
36-
; CHECK-NEXT: [[T7:%.*]] = or i8 [[T4]], [[T6]]
36+
; CHECK-NEXT: [[T7:%.*]] = or disjoint i8 [[T4]], [[T6]]
3737
; CHECK-NEXT: [[T8:%.*]] = xor i8 [[T]], [[T3]]
38-
; CHECK-NEXT: [[T9:%.*]] = or i8 [[T7]], [[T8]]
38+
; CHECK-NEXT: [[T9:%.*]] = or disjoint i8 [[T7]], [[T8]]
3939
; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[T8]], 2
4040
; CHECK-NEXT: [[T11:%.*]] = and i8 [[TMP1]], 32
4141
; CHECK-NEXT: [[T12:%.*]] = xor i8 [[T11]], [[T9]]

‎llvm/test/Transforms/InstCombine/add.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -764,7 +764,7 @@ define i32 @test29(i32 %x, i32 %y) {
764764
; CHECK-NEXT: [[TMP_2:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
765765
; CHECK-NEXT: [[TMP_7:%.*]] = and i32 [[X]], 63
766766
; CHECK-NEXT: [[TMP_9:%.*]] = and i32 [[TMP_2]], -64
767-
; CHECK-NEXT: [[TMP_10:%.*]] = or i32 [[TMP_7]], [[TMP_9]]
767+
; CHECK-NEXT: [[TMP_10:%.*]] = or disjoint i32 [[TMP_7]], [[TMP_9]]
768768
; CHECK-NEXT: ret i32 [[TMP_10]]
769769
;
770770
%tmp.2 = sub i32 %x, %y
@@ -1499,7 +1499,7 @@ define i8 @add_like_or_n1(i8 %x) {
14991499
define i8 @add_like_or_t2_extrause(i8 %x) {
15001500
; CHECK-LABEL: @add_like_or_t2_extrause(
15011501
; CHECK-NEXT: [[I0:%.*]] = shl i8 [[X:%.*]], 4
1502-
; CHECK-NEXT: [[I1:%.*]] = or i8 [[I0]], 15
1502+
; CHECK-NEXT: [[I1:%.*]] = or disjoint i8 [[I0]], 15
15031503
; CHECK-NEXT: call void @use(i8 [[I1]])
15041504
; CHECK-NEXT: [[R:%.*]] = add i8 [[I0]], 57
15051505
; CHECK-NEXT: ret i8 [[R]]
@@ -2361,7 +2361,7 @@ define { i64, i64 } @PR57576(i64 noundef %x, i64 noundef %y, i64 noundef %z, i64
23612361
; CHECK-NEXT: [[ZY:%.*]] = zext i64 [[Y:%.*]] to i128
23622362
; CHECK-NEXT: [[ZZ:%.*]] = zext i64 [[Z:%.*]] to i128
23632363
; CHECK-NEXT: [[SHY:%.*]] = shl nuw i128 [[ZY]], 64
2364-
; CHECK-NEXT: [[XY:%.*]] = or i128 [[SHY]], [[ZX]]
2364+
; CHECK-NEXT: [[XY:%.*]] = or disjoint i128 [[SHY]], [[ZX]]
23652365
; CHECK-NEXT: [[SUB:%.*]] = sub i128 [[XY]], [[ZZ]]
23662366
; CHECK-NEXT: [[T:%.*]] = trunc i128 [[SUB]] to i64
23672367
; CHECK-NEXT: [[TMP1:%.*]] = lshr i128 [[SUB]], 64

‎llvm/test/Transforms/InstCombine/and-or-not.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -553,7 +553,7 @@ define i32 @or_to_nxor_multiuse(i32 %a, i32 %b) {
553553
; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
554554
; CHECK-NEXT: [[OR:%.*]] = or i32 [[A]], [[B]]
555555
; CHECK-NEXT: [[NOTOR:%.*]] = xor i32 [[OR]], -1
556-
; CHECK-NEXT: [[OR2:%.*]] = or i32 [[AND]], [[NOTOR]]
556+
; CHECK-NEXT: [[OR2:%.*]] = or disjoint i32 [[AND]], [[NOTOR]]
557557
; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[AND]], [[NOTOR]]
558558
; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], [[OR2]]
559559
; CHECK-NEXT: ret i32 [[MUL2]]

‎llvm/test/Transforms/InstCombine/and-or.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -217,7 +217,7 @@ define i8 @or_and2_or2(i8 %x) {
217217
; CHECK-NEXT: [[X2:%.*]] = and i8 [[O2]], 66
218218
; CHECK-NEXT: call void @use(i8 [[X2]])
219219
; CHECK-NEXT: [[BITFIELD:%.*]] = and i8 [[X]], -8
220-
; CHECK-NEXT: [[R:%.*]] = or i8 [[BITFIELD]], 3
220+
; CHECK-NEXT: [[R:%.*]] = or disjoint i8 [[BITFIELD]], 3
221221
; CHECK-NEXT: ret i8 [[R]]
222222
;
223223
%o1 = or i8 %x, 1
@@ -243,7 +243,7 @@ define <2 x i8> @or_and2_or2_splat(<2 x i8> %x) {
243243
; CHECK-NEXT: [[X2:%.*]] = and <2 x i8> [[O2]], <i8 66, i8 66>
244244
; CHECK-NEXT: call void @use_vec(<2 x i8> [[X2]])
245245
; CHECK-NEXT: [[BITFIELD:%.*]] = and <2 x i8> [[X]], <i8 -8, i8 -8>
246-
; CHECK-NEXT: [[R:%.*]] = or <2 x i8> [[BITFIELD]], <i8 3, i8 3>
246+
; CHECK-NEXT: [[R:%.*]] = or disjoint <2 x i8> [[BITFIELD]], <i8 3, i8 3>
247247
; CHECK-NEXT: ret <2 x i8> [[R]]
248248
;
249249
%o1 = or <2 x i8> %x, <i8 1, i8 1>
@@ -355,7 +355,7 @@ define i64 @or_or_and_complex(i64 %i) {
355355
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[I]], 8
356356
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP1]], 71777214294589695
357357
; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP2]], -71777214294589696
358-
; CHECK-NEXT: [[OR27:%.*]] = or i64 [[TMP3]], [[TMP4]]
358+
; CHECK-NEXT: [[OR27:%.*]] = or disjoint i64 [[TMP3]], [[TMP4]]
359359
; CHECK-NEXT: ret i64 [[OR27]]
360360
;
361361
%1 = lshr i64 %i, 8

‎llvm/test/Transforms/InstCombine/and.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2433,7 +2433,7 @@ define i8 @negate_lowbitmask_use2(i8 %x, i8 %y) {
24332433
define i64 @test_and_or_constexpr_infloop() {
24342434
; CHECK-LABEL: @test_and_or_constexpr_infloop(
24352435
; CHECK-NEXT: [[AND:%.*]] = and i64 ptrtoint (ptr @g to i64), -8
2436-
; CHECK-NEXT: [[OR:%.*]] = or i64 [[AND]], 1
2436+
; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[AND]], 1
24372437
; CHECK-NEXT: ret i64 [[OR]]
24382438
;
24392439
%and = and i64 ptrtoint (ptr @g to i64), -8

‎llvm/test/Transforms/InstCombine/apint-shift.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -273,7 +273,7 @@ define i18 @test13(i18 %x) {
273273
define i35 @test14(i35 %A) {
274274
; CHECK-LABEL: @test14(
275275
; CHECK-NEXT: [[B:%.*]] = and i35 [[A:%.*]], -19760
276-
; CHECK-NEXT: [[C:%.*]] = or i35 [[B]], 19744
276+
; CHECK-NEXT: [[C:%.*]] = or disjoint i35 [[B]], 19744
277277
; CHECK-NEXT: ret i35 [[C]]
278278
;
279279
%B = lshr i35 %A, 4

‎llvm/test/Transforms/InstCombine/binop-and-shifts.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -365,7 +365,7 @@ define i8 @lshr_xor_or_good_mask(i8 %x, i8 %y) {
365365
; CHECK-LABEL: @lshr_xor_or_good_mask(
366366
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Y:%.*]], [[X:%.*]]
367367
; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP1]], 4
368-
; CHECK-NEXT: [[BW1:%.*]] = or i8 [[TMP2]], 48
368+
; CHECK-NEXT: [[BW1:%.*]] = or disjoint i8 [[TMP2]], 48
369369
; CHECK-NEXT: ret i8 [[BW1]]
370370
;
371371
%shift1 = lshr i8 %x, 4

‎llvm/test/Transforms/InstCombine/binop-of-displaced-shifts.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -271,7 +271,7 @@ define i8 @mismatched_shifts(i8 %x) {
271271
; CHECK-NEXT: [[SHIFT:%.*]] = shl i8 16, [[X]]
272272
; CHECK-NEXT: [[ADD:%.*]] = add i8 [[X]], 1
273273
; CHECK-NEXT: [[SHIFT2:%.*]] = lshr i8 3, [[ADD]]
274-
; CHECK-NEXT: [[BINOP:%.*]] = or i8 [[SHIFT]], [[SHIFT2]]
274+
; CHECK-NEXT: [[BINOP:%.*]] = or disjoint i8 [[SHIFT]], [[SHIFT2]]
275275
; CHECK-NEXT: ret i8 [[BINOP]]
276276
;
277277
%shift = shl i8 16, %x

‎llvm/test/Transforms/InstCombine/bitcast-inselt-bitcast.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define i16 @insert0_v2i8(i16 %x, i8 %y) {
1717
; LE-LABEL: @insert0_v2i8(
1818
; LE-NEXT: [[TMP1:%.*]] = and i16 [[X:%.*]], -256
1919
; LE-NEXT: [[TMP2:%.*]] = zext i8 [[Y:%.*]] to i16
20-
; LE-NEXT: [[R:%.*]] = or i16 [[TMP1]], [[TMP2]]
20+
; LE-NEXT: [[R:%.*]] = or disjoint i16 [[TMP1]], [[TMP2]]
2121
; LE-NEXT: ret i16 [[R]]
2222
;
2323
%v = bitcast i16 %x to <2 x i8>
@@ -33,7 +33,7 @@ define i16 @insert1_v2i8(i16 %x, i8 %y) {
3333
; BE-LABEL: @insert1_v2i8(
3434
; BE-NEXT: [[TMP1:%.*]] = and i16 [[X:%.*]], -256
3535
; BE-NEXT: [[TMP2:%.*]] = zext i8 [[Y:%.*]] to i16
36-
; BE-NEXT: [[R:%.*]] = or i16 [[TMP1]], [[TMP2]]
36+
; BE-NEXT: [[R:%.*]] = or disjoint i16 [[TMP1]], [[TMP2]]
3737
; BE-NEXT: ret i16 [[R]]
3838
;
3939
; LE-LABEL: @insert1_v2i8(
@@ -61,7 +61,7 @@ define i32 @insert0_v4i8(i32 %x, i8 %y) {
6161
; LE-LABEL: @insert0_v4i8(
6262
; LE-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -256
6363
; LE-NEXT: [[TMP2:%.*]] = zext i8 [[Y:%.*]] to i32
64-
; LE-NEXT: [[R:%.*]] = or i32 [[TMP1]], [[TMP2]]
64+
; LE-NEXT: [[R:%.*]] = or disjoint i32 [[TMP1]], [[TMP2]]
6565
; LE-NEXT: ret i32 [[R]]
6666
;
6767
%v = bitcast i32 %x to <4 x i8>
@@ -100,7 +100,7 @@ define i64 @insert0_v4i16(i64 %x, i16 %y) {
100100
; LE-LABEL: @insert0_v4i16(
101101
; LE-NEXT: [[TMP1:%.*]] = and i64 [[X:%.*]], -65536
102102
; LE-NEXT: [[TMP2:%.*]] = zext i16 [[Y:%.*]] to i64
103-
; LE-NEXT: [[R:%.*]] = or i64 [[TMP1]], [[TMP2]]
103+
; LE-NEXT: [[R:%.*]] = or disjoint i64 [[TMP1]], [[TMP2]]
104104
; LE-NEXT: ret i64 [[R]]
105105
;
106106
%v = bitcast i64 %x to <4 x i16>
@@ -131,7 +131,7 @@ define i64 @insert3_v4i16(i64 %x, i16 %y) {
131131
; BE-LABEL: @insert3_v4i16(
132132
; BE-NEXT: [[TMP1:%.*]] = and i64 [[X:%.*]], -65536
133133
; BE-NEXT: [[TMP2:%.*]] = zext i16 [[Y:%.*]] to i64
134-
; BE-NEXT: [[R:%.*]] = or i64 [[TMP1]], [[TMP2]]
134+
; BE-NEXT: [[R:%.*]] = or disjoint i64 [[TMP1]], [[TMP2]]
135135
; BE-NEXT: ret i64 [[R]]
136136
;
137137
; LE-LABEL: @insert3_v4i16(

‎llvm/test/Transforms/InstCombine/bitreverse.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -243,7 +243,7 @@ define i8 @rev8_mul_and_lshr(i8 %0) {
243243
; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 139536
244244
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw nsw i64 [[TMP2]], 32800
245245
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], 558144
246-
; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP4]], [[TMP6]]
246+
; CHECK-NEXT: [[TMP7:%.*]] = or disjoint i64 [[TMP4]], [[TMP6]]
247247
; CHECK-NEXT: [[TMP8:%.*]] = mul nuw nsw i64 [[TMP7]], 65793
248248
; CHECK-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 16
249249
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i8

‎llvm/test/Transforms/InstCombine/bswap.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ define i16 @test1_trunc(i32 %i) {
4242
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[I:%.*]], 24
4343
; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[I]], 8
4444
; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], 65280
45-
; CHECK-NEXT: [[T5:%.*]] = or i32 [[T1]], [[T4]]
45+
; CHECK-NEXT: [[T5:%.*]] = or disjoint i32 [[T1]], [[T4]]
4646
; CHECK-NEXT: [[T13:%.*]] = trunc i32 [[T5]] to i16
4747
; CHECK-NEXT: ret i16 [[T13]]
4848
;
@@ -59,7 +59,7 @@ define i16 @test1_trunc_extra_use(i32 %i) {
5959
; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[I:%.*]], 24
6060
; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[I]], 8
6161
; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], 65280
62-
; CHECK-NEXT: [[T5:%.*]] = or i32 [[T1]], [[T4]]
62+
; CHECK-NEXT: [[T5:%.*]] = or disjoint i32 [[T1]], [[T4]]
6363
; CHECK-NEXT: call void @extra_use(i32 [[T5]])
6464
; CHECK-NEXT: [[T13:%.*]] = trunc i32 [[T5]] to i16
6565
; CHECK-NEXT: ret i16 [[T13]]
@@ -605,7 +605,7 @@ define i64 @bswap_and_mask_1(i64 %0) {
605605
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP0:%.*]], 56
606606
; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], 40
607607
; CHECK-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], 65280
608-
; CHECK-NEXT: [[TMP5:%.*]] = or i64 [[TMP4]], [[TMP2]]
608+
; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[TMP4]], [[TMP2]]
609609
; CHECK-NEXT: ret i64 [[TMP5]]
610610
;
611611
%2 = lshr i64 %0, 56
@@ -781,7 +781,7 @@ define i16 @trunc_bswap_i160(ptr %a0) {
781781
; CHECK-NEXT: [[SH_DIFF:%.*]] = lshr i160 [[LOAD]], 120
782782
; CHECK-NEXT: [[TR_SH_DIFF:%.*]] = trunc i160 [[SH_DIFF]] to i16
783783
; CHECK-NEXT: [[SHL:%.*]] = and i16 [[TR_SH_DIFF]], -256
784-
; CHECK-NEXT: [[OR:%.*]] = or i16 [[AND1]], [[SHL]]
784+
; CHECK-NEXT: [[OR:%.*]] = or disjoint i16 [[AND1]], [[SHL]]
785785
; CHECK-NEXT: ret i16 [[OR]]
786786
;
787787
%load = load i160, ptr %a0, align 4

‎llvm/test/Transforms/InstCombine/cast-mul-select.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ define i32 @eval_sext_multi_use_in_one_inst(i32 %x) {
149149
; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i16
150150
; CHECK-NEXT: [[A:%.*]] = and i16 [[T]], 14
151151
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]]
152-
; CHECK-NEXT: [[O:%.*]] = or i16 [[M]], -32768
152+
; CHECK-NEXT: [[O:%.*]] = or disjoint i16 [[M]], -32768
153153
; CHECK-NEXT: [[R:%.*]] = sext i16 [[O]] to i32
154154
; CHECK-NEXT: ret i32 [[R]]
155155
;
@@ -160,7 +160,7 @@ define i32 @eval_sext_multi_use_in_one_inst(i32 %x) {
160160
; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[A]], metadata [[META77:![0-9]+]], metadata !DIExpression()), !dbg [[DBG82]]
161161
; DBGINFO-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]], !dbg [[DBG83:![0-9]+]]
162162
; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[M]], metadata [[META78:![0-9]+]], metadata !DIExpression()), !dbg [[DBG83]]
163-
; DBGINFO-NEXT: [[O:%.*]] = or i16 [[M]], -32768, !dbg [[DBG84:![0-9]+]]
163+
; DBGINFO-NEXT: [[O:%.*]] = or disjoint i16 [[M]], -32768, !dbg [[DBG84:![0-9]+]]
164164
; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i16 [[O]], metadata [[META79:![0-9]+]], metadata !DIExpression()), !dbg [[DBG84]]
165165
; DBGINFO-NEXT: [[R:%.*]] = sext i16 [[O]] to i32, !dbg [[DBG85:![0-9]+]]
166166
; DBGINFO-NEXT: call void @llvm.dbg.value(metadata i32 [[R]], metadata [[META80:![0-9]+]], metadata !DIExpression()), !dbg [[DBG85]]

‎llvm/test/Transforms/InstCombine/cast.ll

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -467,7 +467,7 @@ define i16 @test40(i16 %a) {
467467
; ALL-LABEL: @test40(
468468
; ALL-NEXT: [[T21:%.*]] = lshr i16 [[A:%.*]], 9
469469
; ALL-NEXT: [[T5:%.*]] = shl i16 [[A]], 8
470-
; ALL-NEXT: [[T32:%.*]] = or i16 [[T21]], [[T5]]
470+
; ALL-NEXT: [[T32:%.*]] = or disjoint i16 [[T21]], [[T5]]
471471
; ALL-NEXT: ret i16 [[T32]]
472472
;
473473
%t = zext i16 %a to i32
@@ -482,7 +482,7 @@ define <2 x i16> @test40vec(<2 x i16> %a) {
482482
; ALL-LABEL: @test40vec(
483483
; ALL-NEXT: [[T21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 9>
484484
; ALL-NEXT: [[T5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 8>
485-
; ALL-NEXT: [[T32:%.*]] = or <2 x i16> [[T21]], [[T5]]
485+
; ALL-NEXT: [[T32:%.*]] = or disjoint <2 x i16> [[T21]], [[T5]]
486486
; ALL-NEXT: ret <2 x i16> [[T32]]
487487
;
488488
%t = zext <2 x i16> %a to <2 x i32>
@@ -497,7 +497,7 @@ define <2 x i16> @test40vec_nonuniform(<2 x i16> %a) {
497497
; ALL-LABEL: @test40vec_nonuniform(
498498
; ALL-NEXT: [[T21:%.*]] = lshr <2 x i16> [[A:%.*]], <i16 9, i16 10>
499499
; ALL-NEXT: [[T5:%.*]] = shl <2 x i16> [[A]], <i16 8, i16 9>
500-
; ALL-NEXT: [[T32:%.*]] = or <2 x i16> [[T21]], [[T5]]
500+
; ALL-NEXT: [[T32:%.*]] = or disjoint <2 x i16> [[T21]], [[T5]]
501501
; ALL-NEXT: ret <2 x i16> [[T32]]
502502
;
503503
%t = zext <2 x i16> %a to <2 x i32>
@@ -646,7 +646,7 @@ define i64 @test48(i8 %A1, i8 %a2) {
646646
; ALL-LABEL: @test48(
647647
; ALL-NEXT: [[Z2:%.*]] = zext i8 [[A1:%.*]] to i32
648648
; ALL-NEXT: [[C:%.*]] = shl nuw nsw i32 [[Z2]], 8
649-
; ALL-NEXT: [[D:%.*]] = or i32 [[C]], [[Z2]]
649+
; ALL-NEXT: [[D:%.*]] = or disjoint i32 [[C]], [[Z2]]
650650
; ALL-NEXT: [[E:%.*]] = zext nneg i32 [[D]] to i64
651651
; ALL-NEXT: ret i64 [[E]]
652652
;
@@ -690,7 +690,7 @@ define i64 @test51(i64 %A, i1 %cond) {
690690
; ALL-NEXT: [[C:%.*]] = and i64 [[A:%.*]], 4294967294
691691
; ALL-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
692692
; ALL-NEXT: [[MASKSEL:%.*]] = zext i1 [[NOT_COND]] to i64
693-
; ALL-NEXT: [[E:%.*]] = or i64 [[C]], [[MASKSEL]]
693+
; ALL-NEXT: [[E:%.*]] = or disjoint i64 [[C]], [[MASKSEL]]
694694
; ALL-NEXT: [[SEXT:%.*]] = shl nuw i64 [[E]], 32
695695
; ALL-NEXT: [[F:%.*]] = ashr exact i64 [[SEXT]], 32
696696
; ALL-NEXT: ret i64 [[F]]
@@ -707,7 +707,7 @@ define i32 @test52(i64 %A) {
707707
; ALL-LABEL: @test52(
708708
; ALL-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32
709709
; ALL-NEXT: [[C:%.*]] = and i32 [[B]], 7224
710-
; ALL-NEXT: [[D:%.*]] = or i32 [[C]], 32962
710+
; ALL-NEXT: [[D:%.*]] = or disjoint i32 [[C]], 32962
711711
; ALL-NEXT: ret i32 [[D]]
712712
;
713713
%B = trunc i64 %A to i16
@@ -720,7 +720,7 @@ define i32 @test52(i64 %A) {
720720
define i64 @test53(i32 %A) {
721721
; ALL-LABEL: @test53(
722722
; ALL-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 7224
723-
; ALL-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 32962
723+
; ALL-NEXT: [[TMP2:%.*]] = or disjoint i32 [[TMP1]], 32962
724724
; ALL-NEXT: [[D:%.*]] = zext nneg i32 [[TMP2]] to i64
725725
; ALL-NEXT: ret i64 [[D]]
726726
;
@@ -735,7 +735,7 @@ define i32 @test54(i64 %A) {
735735
; ALL-LABEL: @test54(
736736
; ALL-NEXT: [[B:%.*]] = trunc i64 [[A:%.*]] to i32
737737
; ALL-NEXT: [[C:%.*]] = and i32 [[B]], 7224
738-
; ALL-NEXT: [[D:%.*]] = or i32 [[C]], -32574
738+
; ALL-NEXT: [[D:%.*]] = or disjoint i32 [[C]], -32574
739739
; ALL-NEXT: ret i32 [[D]]
740740
;
741741
%B = trunc i64 %A to i16
@@ -749,7 +749,7 @@ define i64 @test55(i32 %A) {
749749
; ALL-LABEL: @test55(
750750
; ALL-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 7224
751751
; ALL-NEXT: [[C:%.*]] = zext nneg i32 [[TMP1]] to i64
752-
; ALL-NEXT: [[D:%.*]] = or i64 [[C]], -32574
752+
; ALL-NEXT: [[D:%.*]] = or disjoint i64 [[C]], -32574
753753
; ALL-NEXT: ret i64 [[D]]
754754
;
755755
%B = trunc i32 %A to i16
@@ -814,7 +814,7 @@ define i64 @test58(i64 %A) {
814814
; ALL-LABEL: @test58(
815815
; ALL-NEXT: [[C:%.*]] = lshr i64 [[A:%.*]], 8
816816
; ALL-NEXT: [[D:%.*]] = and i64 [[C]], 16777087
817-
; ALL-NEXT: [[E:%.*]] = or i64 [[D]], 128
817+
; ALL-NEXT: [[E:%.*]] = or disjoint i64 [[D]], 128
818818
; ALL-NEXT: ret i64 [[E]]
819819
;
820820
%B = trunc i64 %A to i32
@@ -832,7 +832,7 @@ define i64 @test59(i8 %A, i8 %B) {
832832
; ALL-NEXT: [[E:%.*]] = and i64 [[D]], 48
833833
; ALL-NEXT: [[TMP1:%.*]] = lshr i8 [[B:%.*]], 4
834834
; ALL-NEXT: [[G:%.*]] = zext nneg i8 [[TMP1]] to i64
835-
; ALL-NEXT: [[H:%.*]] = or i64 [[E]], [[G]]
835+
; ALL-NEXT: [[H:%.*]] = or disjoint i64 [[E]], [[G]]
836836
; ALL-NEXT: ret i64 [[H]]
837837
;
838838
%C = zext i8 %A to i32
@@ -2139,7 +2139,7 @@ define i32 @test95(i32 %x) {
21392139
; ALL-LABEL: @test95(
21402140
; ALL-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
21412141
; ALL-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2
2142-
; ALL-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], 40
2142+
; ALL-NEXT: [[TMP3:%.*]] = or disjoint i32 [[TMP2]], 40
21432143
; ALL-NEXT: ret i32 [[TMP3]]
21442144
;
21452145
%1 = trunc i32 %x to i8

‎llvm/test/Transforms/InstCombine/free-inversion.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ define i8 @lshr_not_nneg(i8 %x, i8 %y) {
526526
define i8 @lshr_not_nneg2(i8 %x) {
527527
; CHECK-LABEL: @lshr_not_nneg2(
528528
; CHECK-NEXT: [[SHR:%.*]] = lshr i8 [[X:%.*]], 1
529-
; CHECK-NEXT: [[SHR_NOT1:%.*]] = or i8 [[SHR]], -128
529+
; CHECK-NEXT: [[SHR_NOT1:%.*]] = or disjoint i8 [[SHR]], -128
530530
; CHECK-NEXT: ret i8 [[SHR_NOT1]]
531531
;
532532
%x.not = xor i8 %x, -1

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