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[X86][FP16] Promote FP16->[U]INT to FP16->FP32->[U]INT
This is to avoid f16->i64 being lowered to `__fixhfdi/__fixunshfdi` on 32-bits since neither libgcc nor compiler-rt provide them. https://godbolt.org/z/cjWEsea5v It also helps to improve the performance by promoting the vector type. Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D131828
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32734,8 +32734,29 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
3273432734
N->getOpcode() == ISD::STRICT_FP_TO_SINT;
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EVT VT = N->getValueType(0);
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SDValue Src = N->getOperand(IsStrict ? 1 : 0);
32737+
SDValue Chain = IsStrict ? N->getOperand(0) : SDValue();
3273732738
EVT SrcVT = Src.getValueType();
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32740+
SDValue Res;
32741+
if (isSoftFP16(SrcVT)) {
32742+
EVT NVT = VT.isVector() ? VT.changeVectorElementType(MVT::f32) : MVT::f32;
32743+
if (IsStrict) {
32744+
Res =
32745+
DAG.getNode(N->getOpcode(), dl, {VT, MVT::Other},
32746+
{Chain, DAG.getNode(ISD::STRICT_FP_EXTEND, dl,
32747+
{NVT, MVT::Other}, {Chain, Src})});
32748+
Chain = Res.getValue(1);
32749+
} else {
32750+
Res = DAG.getNode(N->getOpcode(), dl, VT,
32751+
DAG.getNode(ISD::FP_EXTEND, dl, NVT, Src));
32752+
}
32753+
Results.push_back(Res);
32754+
if (IsStrict)
32755+
Results.push_back(Chain);
32756+
32757+
return;
32758+
}
32759+
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if (VT.isVector() && Subtarget.hasFP16() &&
3274032761
SrcVT.getVectorElementType() == MVT::f16) {
3274132762
EVT EleVT = VT.getVectorElementType();
@@ -32749,7 +32770,6 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
3274932770
Src = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8f16, Ops);
3275032771
}
3275132772

32752-
SDValue Res, Chain;
3275332773
if (IsStrict) {
3275432774
unsigned Opc =
3275532775
IsSigned ? X86ISD::STRICT_CVTTP2SI : X86ISD::STRICT_CVTTP2UI;
@@ -32941,7 +32961,6 @@ void X86TargetLowering::ReplaceNodeResults(SDNode *N,
3294132961
return;
3294232962
}
3294332963

32944-
SDValue Chain;
3294532964
if (SDValue V = FP_TO_INTHelper(SDValue(N, 0), DAG, IsSigned, Chain)) {
3294632965
Results.push_back(V);
3294732966
if (IsStrict)

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