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koachantru
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[SPARC] Remove assertions in printOperand for inline asm operands (#104692)
Inline asm operands could contain any kind of relocation, so remove the checks. Fixes #103493 (cherry picked from commit 576b7a7)
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+10
-51
lines changed

2 files changed

+10
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llvm/lib/Target/Sparc/SparcAsmPrinter.cpp

-51
Original file line numberDiff line numberDiff line change
@@ -314,57 +314,6 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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const MachineOperand &MO = MI->getOperand (opNum);
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SparcMCExpr::VariantKind TF = (SparcMCExpr::VariantKind) MO.getTargetFlags();
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#ifndef NDEBUG
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// Verify the target flags.
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if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
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if (MI->getOpcode() == SP::CALL)
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assert(TF == SparcMCExpr::VK_Sparc_None &&
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"Cannot handle target flags on call address");
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else if (MI->getOpcode() == SP::SETHIi)
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assert((TF == SparcMCExpr::VK_Sparc_HI
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|| TF == SparcMCExpr::VK_Sparc_H44
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|| TF == SparcMCExpr::VK_Sparc_HH
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|| TF == SparcMCExpr::VK_Sparc_LM
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|| TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22
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|| TF == SparcMCExpr::VK_Sparc_TLS_IE_HI22
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|| TF == SparcMCExpr::VK_Sparc_TLS_LE_HIX22) &&
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"Invalid target flags for address operand on sethi");
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else if (MI->getOpcode() == SP::TLS_CALL)
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assert((TF == SparcMCExpr::VK_Sparc_None
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|| TF == SparcMCExpr::VK_Sparc_TLS_GD_CALL
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_CALL) &&
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"Cannot handle target flags on tls call address");
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else if (MI->getOpcode() == SP::TLS_ADDrr)
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assert((TF == SparcMCExpr::VK_Sparc_TLS_GD_ADD
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_ADD
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDO_ADD
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|| TF == SparcMCExpr::VK_Sparc_TLS_IE_ADD) &&
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"Cannot handle target flags on add for TLS");
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else if (MI->getOpcode() == SP::TLS_LDrr)
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assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LD &&
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"Cannot handle target flags on ld for TLS");
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else if (MI->getOpcode() == SP::TLS_LDXrr)
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assert(TF == SparcMCExpr::VK_Sparc_TLS_IE_LDX &&
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"Cannot handle target flags on ldx for TLS");
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else if (MI->getOpcode() == SP::XORri)
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assert((TF == SparcMCExpr::VK_Sparc_TLS_LDO_LOX10
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|| TF == SparcMCExpr::VK_Sparc_TLS_LE_LOX10) &&
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"Cannot handle target flags on xor for TLS");
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else
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assert((TF == SparcMCExpr::VK_Sparc_LO
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|| TF == SparcMCExpr::VK_Sparc_M44
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|| TF == SparcMCExpr::VK_Sparc_L44
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|| TF == SparcMCExpr::VK_Sparc_HM
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|| TF == SparcMCExpr::VK_Sparc_TLS_GD_LO10
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_LO10
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|| TF == SparcMCExpr::VK_Sparc_TLS_IE_LO10 ) &&
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"Invalid target flags for small address operand");
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}
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#endif
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bool CloseParen = SparcMCExpr::printVariantKind(O, TF);
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switch (MO.getType()) {

llvm/test/CodeGen/SPARC/inlineasm.ll

+10
Original file line numberDiff line numberDiff line change
@@ -152,3 +152,13 @@ define i64 @test_twinword(){
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%1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i0}"()
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ret i64 %1
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}
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; CHECK-LABEL: test_symbol:
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; CHECK: ba,a brtarget
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define void @test_symbol() {
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Entry:
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call void asm sideeffect "ba,a ${0}", "X"(ptr @brtarget)
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unreachable
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}
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declare void @brtarget()

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