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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
1 | 2 | ; RUN: llc < %s | FileCheck %s |
2 | 3 | target datalayout = "e-m:e-i64:64-n32:64" |
3 | 4 | target triple = "powerpc64le-unknown-linux-gnu" |
4 | 5 |
|
5 | 6 | define i1 @and_cmp_variable_power_of_two(i32 %x, i32 %y) { |
| 7 | +; CHECK-LABEL: and_cmp_variable_power_of_two: |
| 8 | +; CHECK: # %bb.0: |
| 9 | +; CHECK-NEXT: subfic 4, 4, 32 |
| 10 | +; CHECK-NEXT: rlwnm 3, 3, 4, 31, 31 |
| 11 | +; CHECK-NEXT: blr |
6 | 12 | %shl = shl i32 1, %y |
7 | 13 | %and = and i32 %x, %shl |
8 | 14 | %cmp = icmp eq i32 %and, %shl |
9 | 15 | ret i1 %cmp |
10 | | - |
11 | | -; CHECK-LABEL: @and_cmp_variable_power_of_two |
12 | | -; CHECK: subfic 4, 4, 32 |
13 | | -; CHECK: rlwnm 3, 3, 4, 31, 31 |
14 | | -; CHECK: blr |
15 | 16 | } |
16 | 17 |
|
17 | 18 | define i1 @and_cmp_variable_power_of_two_64(i64 %x, i64 %y) { |
| 19 | +; CHECK-LABEL: and_cmp_variable_power_of_two_64: |
| 20 | +; CHECK: # %bb.0: |
| 21 | +; CHECK-NEXT: subfic 4, 4, 64 |
| 22 | +; CHECK-NEXT: rldcl 3, 3, 4, 63 |
| 23 | +; CHECK-NEXT: blr |
18 | 24 | %shl = shl i64 1, %y |
19 | 25 | %and = and i64 %x, %shl |
20 | 26 | %cmp = icmp eq i64 %and, %shl |
21 | 27 | ret i1 %cmp |
22 | | - |
23 | | -; CHECK-LABEL: @and_cmp_variable_power_of_two_64 |
24 | | -; CHECK: subfic 4, 4, 64 |
25 | | -; CHECK: rldcl 3, 3, 4, 63 |
26 | | -; CHECK: blr |
27 | 28 | } |
28 | 29 |
|
29 | 30 | define i1 @and_ncmp_variable_power_of_two(i32 %x, i32 %y) { |
| 31 | +; CHECK-LABEL: and_ncmp_variable_power_of_two: |
| 32 | +; CHECK: # %bb.0: |
| 33 | +; CHECK-NEXT: subfic 4, 4, 32 |
| 34 | +; CHECK-NEXT: nor 3, 3, 3 |
| 35 | +; CHECK-NEXT: rlwnm 3, 3, 4, 31, 31 |
| 36 | +; CHECK-NEXT: blr |
30 | 37 | %shl = shl i32 1, %y |
31 | 38 | %and = and i32 %x, %shl |
32 | 39 | %cmp = icmp ne i32 %and, %shl |
33 | 40 | ret i1 %cmp |
34 | | - |
35 | | -; CHECK-LABEL: @and_ncmp_variable_power_of_two |
36 | | -; CHECK-DAG: subfic 4, 4, 32 |
37 | | -; CHECK-DAG: nor [[REG:[0-9]+]], 3, 3 |
38 | | -; CHECK: rlwnm 3, [[REG]], 4, 31, 31 |
39 | | -; CHECK: blr |
40 | 41 | } |
41 | 42 |
|
42 | 43 | define i1 @and_ncmp_variable_power_of_two_64(i64 %x, i64 %y) { |
| 44 | +; CHECK-LABEL: and_ncmp_variable_power_of_two_64: |
| 45 | +; CHECK: # %bb.0: |
| 46 | +; CHECK-NEXT: not 3, 3 |
| 47 | +; CHECK-NEXT: subfic 4, 4, 64 |
| 48 | +; CHECK-NEXT: rldcl 3, 3, 4, 63 |
| 49 | +; CHECK-NEXT: blr |
43 | 50 | %shl = shl i64 1, %y |
44 | 51 | %and = and i64 %x, %shl |
45 | 52 | %cmp = icmp ne i64 %and, %shl |
46 | 53 | ret i1 %cmp |
47 | | - |
48 | | -; CHECK-LABEL: @and_ncmp_variable_power_of_two_64 |
49 | | -; CHECK-DAG: subfic 4, 4, 64 |
50 | | -; CHECK-DAG: not [[REG:[0-9]+]], 3 |
51 | | -; CHECK: rldcl 3, [[REG]], 4, 63 |
52 | | -; CHECK: blr |
53 | 54 | } |
54 | | - |
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