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[RISCV] Only emit .option when extension is supported
It maybe emit the .option directive without any follow up. Only emit the .option push/pop when there are supported extension difference between function and module. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D159399
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2 files changed

+12
-15
lines changed

2 files changed

+12
-15
lines changed

llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp

Lines changed: 10 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -88,8 +88,7 @@ class RISCVAsmPrinter : public AsmPrinter {
8888
void emitEndOfAsmFile(Module &M) override;
8989

9090
void emitFunctionEntryLabel() override;
91-
void emitDirectiveOptionArch();
92-
bool isSameAttribute();
91+
bool emitDirectiveOptionArch();
9392

9493
private:
9594
void emitAttributes();
@@ -252,7 +251,7 @@ bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
252251
return false;
253252
}
254253

255-
void RISCVAsmPrinter::emitDirectiveOptionArch() {
254+
bool RISCVAsmPrinter::emitDirectiveOptionArch() {
256255
RISCVTargetStreamer &RTS =
257256
static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
258257
SmallVector<RISCVOptionArchArg> NeedEmitStdOptionArgs;
@@ -268,28 +267,26 @@ void RISCVAsmPrinter::emitDirectiveOptionArch() {
268267
: RISCVOptionArchArgType::Minus;
269268
NeedEmitStdOptionArgs.emplace_back(Delta, Feature.Key);
270269
}
271-
if (!NeedEmitStdOptionArgs.empty())
270+
if (!NeedEmitStdOptionArgs.empty()) {
271+
RTS.emitDirectiveOptionPush();
272272
RTS.emitDirectiveOptionArch(NeedEmitStdOptionArgs);
273-
}
273+
return true;
274+
}
274275

275-
bool RISCVAsmPrinter::isSameAttribute() {
276-
const MCSubtargetInfo &MCSTI = *TM.getMCSubtargetInfo();
277-
return MCSTI.getFeatureBits() == STI->getFeatureBits();
276+
return false;
278277
}
279278

280279
bool RISCVAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
281280
STI = &MF.getSubtarget<RISCVSubtarget>();
282281
RISCVTargetStreamer &RTS =
283282
static_cast<RISCVTargetStreamer &>(*OutStreamer->getTargetStreamer());
284-
if (!isSameAttribute()) {
285-
RTS.emitDirectiveOptionPush();
286-
emitDirectiveOptionArch();
287-
}
283+
284+
bool EmittedOptionArch = emitDirectiveOptionArch();
288285

289286
SetupMachineFunction(MF);
290287
emitFunctionBody();
291288

292-
if (!isSameAttribute())
289+
if (EmittedOptionArch)
293290
RTS.emitDirectiveOptionPop();
294291
return false;
295292
}

llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,10 @@ entry:
3535
ret void
3636
}
3737

38-
; CHECK: .option push
38+
; CHECK-NOT: .option push
3939
define void @test5() "target-features"="+unaligned-scalar-mem" {
4040
; CHECK-LABEL: test5
41-
; CHECK: .option pop
41+
; CHECK-NOT: .option pop
4242
entry:
4343
ret void
4444
}

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