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Address review comments
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+59
-161
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12 files changed

+59
-161
lines changed

‎clang/test/CodeGenOpenCL/convergent.cl‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ kernel void assume_convergent_asm()
133133
__asm__ volatile("s_barrier");
134134
}
135135

136-
// CHECK: attributes #0 = { nofree noinline norecurse nounwind "
136+
// CHECK: attributes #0 = { nofree noinline norecurse nounwind memory(readwrite, target_mem0: none, target_mem1: none) "
137137
// CHECK: attributes #1 = { {{[^}]*}}convergent{{[^}]*}} }
138138
// CHECK: attributes #2 = { {{[^}]*}}convergent{{[^}]*}} }
139139
// CHECK: attributes #3 = { {{[^}]*}}convergent noduplicate{{[^}]*}} }

‎llvm/include/llvm/IR/Intrinsics.td‎

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -52,16 +52,19 @@ def IntrInaccessibleMemOnly : IntrinsicProperty;
5252

5353

5454
class IntrinsicMemoryLocation;
55-
// These are used to represent Generic Memory Location.
55+
// Tablegen representation of IRMemLocation.
56+
// TODO: Populate with all IRMemLocation enum values and update
57+
// getValueAsIRMemLocation accordingly.
58+
def InaccessibleMem : IntrinsicMemoryLocation;
5659
def TargetMem0 : IntrinsicMemoryLocation;
5760
def TargetMem1 : IntrinsicMemoryLocation;
58-
// IntrInaccessible{Read|Write}MemOnly needs to set Location
61+
// The list of IRMemoryLocations that are read from.
5962
class IntrRead<list<IntrinsicMemoryLocation> idx> : IntrinsicProperty {
60-
list<IntrinsicMemoryLocation> Loc=idx;
63+
list<IntrinsicMemoryLocation> MemLoc=idx;
6164
}
62-
65+
// The list of IRMemoryLocations that are write from.
6366
class IntrWrite<list<IntrinsicMemoryLocation> idx> : IntrinsicProperty {
64-
list<IntrinsicMemoryLocation> Loc=idx;
67+
list<IntrinsicMemoryLocation> MemLoc=idx;
6568
}
6669

6770

‎llvm/include/llvm/Support/ModRef.h‎

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -158,18 +158,6 @@ template <typename LocationEnum> class MemoryEffectsBase {
158158
return MemoryEffectsBase(Location::Other, MR);
159159
}
160160

161-
/// Create MemoryEffectsBase that can only read inaccessible memory.
162-
static MemoryEffectsBase
163-
inaccessibleReadMemOnly(Location Loc = Location::InaccessibleMem) {
164-
return MemoryEffectsBase(Loc, ModRefInfo::Ref);
165-
}
166-
167-
/// Create MemoryEffectsBase that can only write inaccessible memory.
168-
static MemoryEffectsBase
169-
inaccessibleWriteMemOnly(Location Loc = Location::InaccessibleMem) {
170-
return MemoryEffectsBase(Loc, ModRefInfo::Mod);
171-
}
172-
173161
/// Checks if only target-specific memory locations are set.
174162
/// Ignores standard locations like ArgMem or InaccessibleMem.
175163
/// Needed because `Data` may be non-zero by default unless explicitly
@@ -182,16 +170,6 @@ template <typename LocationEnum> class MemoryEffectsBase {
182170
return ME.doesNotAccessMemory();
183171
}
184172

185-
/// Create MemoryEffectsBase that can only access Target Memory Locations
186-
static MemoryEffectsBase
187-
setTargetMemLocationModRef(ModRefInfo MR = ModRefInfo::NoModRef) {
188-
MemoryEffectsBase FRMB = none();
189-
for (unsigned I = static_cast<int>(LocationEnum::FirstTarget);
190-
I <= static_cast<int>(LocationEnum::Last); I++)
191-
FRMB.setModRef(static_cast<Location>(I), MR);
192-
return FRMB;
193-
}
194-
195173
/// Create MemoryEffectsBase that can only access inaccessible or argument
196174
/// memory.
197175
static MemoryEffectsBase

‎llvm/lib/IR/Attributes.cpp‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -630,6 +630,7 @@ std::string Attribute::getAsString(bool InAttrGrp) const {
630630
// Print access kind for "other" as the default access kind. This way it
631631
// will apply to any new location kinds that get split out of "other".
632632
ModRefInfo OtherMR = ME.getModRef(IRMemLocation::Other);
633+
ModRefInfo InaccessibleMemMR = ME.getModRef(IRMemLocation::InaccessibleMem);
633634
if (OtherMR != ModRefInfo::NoModRef || ME.getModRef() == OtherMR) {
634635
First = false;
635636
OS << getModRefStr(OtherMR);
@@ -640,11 +641,9 @@ std::string Attribute::getAsString(bool InAttrGrp) const {
640641
if (MR == OtherMR)
641642
continue;
642643

643-
// Dont Print Target Location if MR and target_mems ModRefInfo
644-
// are NoModRef.
645-
// Printing Inacessiblemem: none implies that target_mems are also
646-
// not affected.
647-
if (ME.isTargetMemLoc(Loc) && (MR == ModRefInfo::NoModRef))
644+
// Only prints Target Location if InaccessibleMem and Target_MemX
645+
// ModRefInfo is different. Otherwise skpit Target_Mem print
646+
if (ME.isTargetMemLoc(Loc) && MR == InaccessibleMemMR)
648647
continue;
649648

650649
if (!First)

‎llvm/lib/Transforms/IPO/FunctionAttrs.cpp‎

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -285,15 +285,7 @@ static void addMemoryAttrs(const SCCNodeSet &SCCNodes, AARGetterT &&AARGetter,
285285
checkFunctionMemoryAccess(*F, F->hasExactDefinition(), AAR, SCCNodes);
286286
ME |= FnME;
287287
RecursiveArgME |= FnRecursiveArgME;
288-
// If no Target Memory location is specified, default to ModRef.
289-
// This preserves the same behavior as before Target Memory was introduced,
290-
// since Target Memory is never set at this point.
291-
MemoryEffects METarget = ME;
292-
if (ME.getModRef(IRMemLocation::TargetMem0) == ModRefInfo::NoModRef and
293-
ME.getModRef(IRMemLocation::TargetMem1) == ModRefInfo::NoModRef)
294-
METarget |= ME.setTargetMemLocationModRef(ModRefInfo::ModRef);
295-
// Reached bottom of the lattice, we will not be able to improve the result.
296-
if (ME == MemoryEffects::unknown() or METarget == MemoryEffects::unknown())
288+
if (ME == MemoryEffects::unknown())
297289
return;
298290
}
299291

‎llvm/test/Assembler/memory-attribute.ll‎

Lines changed: 25 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -80,26 +80,41 @@ declare void @fn_argmem_read_inaccessiblemem_write_reordered()
8080
memory(inaccessiblemem: write, argmem: read)
8181

8282
; CHECK: Function Attrs: memory(target_mem0: write)
83-
; CHECK: @fn_inaccessiblemem_write_mem_target0()
84-
declare void @fn_inaccessiblemem_write_mem_target0()
83+
; CHECK: @fn_write_mem_target0()
84+
declare void @fn_write_mem_target0()
8585
memory(target_mem0: write)
8686

8787
; CHECK: Function Attrs: memory(target_mem0: read)
88-
; CHECK: @fn_inaccessiblemem_read_mem_target0()
89-
declare void @fn_inaccessiblemem_read_mem_target0()
88+
; CHECK: @fn_read_mem_target0()
89+
declare void @fn_read_mem_target0()
9090
memory(target_mem0: read)
9191

9292
; CHECK: Function Attrs: memory(target_mem1: write)
93-
; CHECK: @fn_inaccessiblemem_write_target_mem1()
94-
declare void @fn_inaccessiblemem_write_target_mem1()
93+
; CHECK: @fn_write_target_mem1()
94+
declare void @fn_write_target_mem1()
9595
memory(target_mem1: write)
9696

9797
; CHECK: Function Attrs: memory(target_mem1: read)
98-
; CHECK: @fn_inaccessiblemem_read_target_mem1()
99-
declare void @fn_inaccessiblemem_read_target_mem1()
98+
; CHECK: @fn_read_target_mem1()
99+
declare void @fn_read_target_mem1()
100100
memory(target_mem1: read)
101101

102102
; CHECK: Function Attrs: memory(target_mem0: read, target_mem1: write)
103-
; CHECK: @fn_inaccessiblemem_read_target_mem0_write_mem_target1()
104-
declare void @fn_inaccessiblemem_read_target_mem0_write_mem_target1()
103+
; CHECK: @fn_read_target_mem0_write_mem_target1()
104+
declare void @fn_read_target_mem0_write_mem_target1()
105105
memory(target_mem0: read, target_mem1: write)
106+
107+
; CHECK: Function Attrs: memory(inaccessiblemem: write)
108+
; CHECK: @fn_inaccessiblemem_write_new()
109+
declare void @fn_inaccessiblemem_write_new()
110+
memory(inaccessiblemem: write)
111+
112+
; CHECK: Function Attrs: memory(inaccessiblemem: read)
113+
; CHECK: @fn_inaccessiblemem_target_mem0_1read()
114+
declare void @fn_inaccessiblemem_target_mem0_1read()
115+
memory(inaccessiblemem: read, target_mem0: read, target_mem0: read)
116+
117+
; CHECK: Function Attrs: memory(target_mem0: read)
118+
; CHECK: @fn_inaccessiblemem_none_target_mem0_read()
119+
declare void @fn_inaccessiblemem_none_target_mem0_read()
120+
memory(inaccessiblemem: none, target_mem0: read)

‎llvm/test/Bitcode/memory-attribute-upgrade.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: llvm-dis < %S/Inputs/memory-attribute-upgrade.bc | FileCheck %s
22

3-
; CHECK: ; Function Attrs: memory(write, argmem: read)
3+
; CHECK: ; Function Attrs: memory(write, argmem: read, target_mem0: none, target_mem1: none)
44
; CHECK-NEXT: define void @test_any_write_argmem_read(ptr %p)
55

66
; CHECK: ; Function Attrs: memory(read, argmem: readwrite, inaccessiblemem: none)

‎llvm/test/TableGen/target-mem-intrinsic-attrs.td‎

Lines changed: 13 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,8 @@
22

33
include "llvm/IR/Intrinsics.td"
44

5+
def int_aarch64_set_inaccessible_mem : DefaultAttrsIntrinsic<[], [llvm_i64_ty], [IntrWriteMem, IntrWrite<[InaccessibleMem]>]>;
6+
57
def int_aarch64_set_target_mem0 : DefaultAttrsIntrinsic<[], [llvm_i64_ty], [IntrWriteMem, IntrWrite<[TargetMem0]>]>;
68

79
def int_aarch64_get_target_mem1 : DefaultAttrsIntrinsic<[], [llvm_i64_ty], [IntrReadMem, IntrRead<[TargetMem1]>]>;
@@ -12,14 +14,6 @@ def int_aarch64_get_target_mem1_set_target_mem1 : DefaultAttrsIntrinsic<[], [l
1214

1315
def int_aarch64_get_target_mem0_mem1 : DefaultAttrsIntrinsic<[], [llvm_i64_ty], [IntrReadMem, IntrRead<[TargetMem0, TargetMem1]>]>;
1416

15-
// CHECK: static constexpr unsigned IntrinsicNameOffsetTable[] = {
16-
// CHECK-NEXT: 1, // not_intrinsic
17-
// CHECK-NEXT: 15, // llvm.aarch64.get.target.mem0.mem1
18-
// CHECK-NEXT: 49, // llvm.aarch64.get.target.mem0.set.target.mem1
19-
// CHECK-NEXT: 94, // llvm.aarch64.get.target.mem1
20-
// CHECK-NEXT: 123, // llvm.aarch64.get.target.mem1.set.target.mem1
21-
// CHECK-NEXT: 168, // llvm.aarch64.set.target.mem0
22-
2317

2418
// CHECK: static AttributeSet getIntrinsicFnAttributeSet(LLVMContext &C, unsigned ID) {
2519
// CHECK-NEXT: switch (ID) {
@@ -64,7 +58,17 @@ def int_aarch64_get_target_mem0_mem1 : DefaultAttrsIntrinsic<[], [llvm_i64_ty]
6458
// CHECK-NEXT: // ArgMem: NoModRef, InaccessibleMem: NoModRef, ErrnoMem: NoModRef, Other: NoModRef, TargetMem0: NoModRef, TargetMem1: ModRef
6559
// CHECK-NEXT: Attribute::getWithMemoryEffects(C, MemoryEffects::createFromIntValue(3072)),
6660
// CHECK-NEXT: });
67-
// CHECK-NEXT: case 4: // llvm.aarch64.set.target.mem0
61+
// CHECK-NEXT: case 4: // llvm.aarch64.set.inaccessible.mem
62+
// CHECK-NEXT: return AttributeSet::get(C, {
63+
// CHECK-NEXT: Attribute::get(C, Attribute::NoUnwind),
64+
// CHECK-NEXT: Attribute::get(C, Attribute::NoCallback),
65+
// CHECK-NEXT: Attribute::get(C, Attribute::NoSync),
66+
// CHECK-NEXT: Attribute::get(C, Attribute::NoFree),
67+
// CHECK-NEXT: Attribute::get(C, Attribute::WillReturn),
68+
// CHECK-NEXT: // ArgMem: NoModRef, InaccessibleMem: Mod, ErrnoMem: NoModRef, Other: NoModRef, TargetMem0: NoModRef, TargetMem1: NoModRef
69+
// CHECK-NEXT: Attribute::getWithMemoryEffects(C, MemoryEffects::createFromIntValue(8)),
70+
// CHECK-NEXT: });
71+
// CHECK-NEXT: case 5: // llvm.aarch64.set.target.mem0
6872
// CHECK-NEXT: return AttributeSet::get(C, {
6973
// CHECK-NEXT: Attribute::get(C, Attribute::NoUnwind),
7074
// CHECK-NEXT: Attribute::get(C, Attribute::NoCallback),

‎llvm/test/Transforms/FunctionAttrs/initializes.ll‎

Lines changed: 0 additions & 87 deletions
Original file line numberDiff line numberDiff line change
@@ -663,90 +663,3 @@ define void @memset_large_offset_nonzero_size(ptr %dst) {
663663
call void @llvm.memset.p0.i64(ptr %offset, i8 0, i64 3, i1 false)
664664
ret void
665665
}
666-
667-
668-
; Check Target Memory Location keeps the attributes correct with volatile
669-
670-
define void @mem_target_f1(ptr %p){
671-
; CHECK-LABEL: define void @mem_target_f1(
672-
; CHECK-SAME: ptr readnone captures(address) [[P:%.*]]) {
673-
; CHECK-NEXT: call void @target0_no_read_write(ptr [[P]])
674-
; CHECK-NEXT: store volatile i32 0, ptr undef, align 4
675-
; CHECK-NEXT: ret void
676-
;
677-
call void @target0_no_read_write(ptr %p)
678-
store volatile i32 0, ptr undef, align 4
679-
ret void
680-
}
681-
682-
define void @mem_target_f2(ptr %p){
683-
; CHECK-LABEL: define void @mem_target_f2(
684-
; CHECK-SAME: ptr [[P:%.*]]) {
685-
; CHECK-NEXT: call void @targets_read_write(ptr [[P]])
686-
; CHECK-NEXT: store volatile i32 0, ptr undef, align 4
687-
; CHECK-NEXT: ret void
688-
;
689-
call void @targets_read_write(ptr %p)
690-
store volatile i32 0, ptr undef, align 4
691-
ret void
692-
}
693-
694-
define void @mem_target_f3(ptr %p){
695-
; CHECK: Function Attrs: memory(readwrite)
696-
; CHECK-LABEL: define void @mem_target_f3(
697-
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR7:[0-9]+]] {
698-
; CHECK-NEXT: call void @target_read_or_write(ptr [[P]])
699-
; CHECK-NEXT: store volatile i32 0, ptr undef, align 4
700-
; CHECK-NEXT: ret void
701-
;
702-
call void @target_read_or_write(ptr %p)
703-
store volatile i32 0, ptr undef, align 4
704-
ret void
705-
}
706-
707-
708-
; Without volatile
709-
710-
; Check Target Memory Location keeps the attributes correct with volatile
711-
define void @mem_target_f4(ptr %p){
712-
; CHECK: Function Attrs: memory(write, inaccessiblemem: none)
713-
; CHECK-LABEL: define void @mem_target_f4(
714-
; CHECK-SAME: ptr readnone captures(address) [[P:%.*]]) #[[ATTR8:[0-9]+]] {
715-
; CHECK-NEXT: call void @target0_no_read_write(ptr [[P]])
716-
; CHECK-NEXT: store i32 0, ptr undef, align 4
717-
; CHECK-NEXT: ret void
718-
;
719-
call void @target0_no_read_write(ptr %p)
720-
store i32 0, ptr undef, align 4
721-
ret void
722-
}
723-
724-
define void @mem_target_f5(ptr %p){
725-
; CHECK: Function Attrs: memory(write, inaccessiblemem: none, target_mem0: readwrite, target_mem1: readwrite)
726-
; CHECK-LABEL: define void @mem_target_f5(
727-
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR9:[0-9]+]] {
728-
; CHECK-NEXT: call void @targets_read_write(ptr [[P]])
729-
; CHECK-NEXT: store i32 0, ptr undef, align 4
730-
; CHECK-NEXT: ret void
731-
;
732-
call void @targets_read_write(ptr %p)
733-
store i32 0, ptr undef, align 4
734-
ret void
735-
}
736-
737-
define void @mem_target_f6(ptr %p){
738-
; CHECK: Function Attrs: memory(write, inaccessiblemem: none, target_mem1: readwrite)
739-
; CHECK-LABEL: define void @mem_target_f6(
740-
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR10:[0-9]+]] {
741-
; CHECK-NEXT: call void @target_read_or_write(ptr [[P]])
742-
; CHECK-NEXT: store i32 0, ptr undef, align 4
743-
; CHECK-NEXT: ret void
744-
;
745-
call void @target_read_or_write(ptr %p)
746-
store i32 0, ptr undef, align 4
747-
ret void
748-
}
749-
750-
declare void @target0_no_read_write(ptr) memory(target_mem0: none, target_mem1: none);
751-
declare void @targets_read_write(ptr %p)memory(target_mem0: readwrite, target_mem1: readwrite);
752-
declare void @target_read_or_write(ptr) memory(target_mem0: none, target_mem1: readwrite);

‎llvm/test/Transforms/FunctionAttrs/nocapture.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -744,7 +744,7 @@ entry:
744744

745745
@g2 = global ptr null
746746
define void @captureLaunder(ptr %p) {
747-
; FNATTRS: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: readwrite)
747+
; FNATTRS: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: readwrite, target_mem0: none, target_mem1: none)
748748
; FNATTRS-LABEL: define void @captureLaunder
749749
; FNATTRS-SAME: (ptr [[P:%.*]]) #[[ATTR16:[0-9]+]] {
750750
; FNATTRS-NEXT: [[B:%.*]] = call ptr @llvm.launder.invariant.group.p0(ptr [[P]])

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