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huntergr-armhuntergr-arm
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improved tests
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‎llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll‎

Lines changed: 34 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -1,51 +1,40 @@
1-
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
22
; RUN: opt -passes=loop-vectorize,instcombine -S < %s 2>&1 | FileCheck %s --check-prefix=NEON
33
; RUN: opt -passes=loop-vectorize,instcombine -mattr=+sve -S < %s 2>&1 | FileCheck %s --check-prefix=SVE
44

55
target triple = "aarch64-linux-gnu"
66

7-
define i32 @simple_csa_int_select(i32 %N, ptr %data, i32 %a) {
7+
define i32 @simple_csa_int_select(i64 %N, ptr %data, i32 %a) {
88
; NEON-LABEL: define i32 @simple_csa_int_select(
9-
; NEON-SAME: i32 [[N:%.*]], ptr [[DATA:%.*]], i32 [[A:%.*]]) {
9+
; NEON-SAME: i64 [[N:%.*]], ptr [[DATA:%.*]], i32 [[A:%.*]]) {
1010
; NEON-NEXT: [[ENTRY:.*]]:
11-
; NEON-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0
12-
; NEON-NEXT: br i1 [[CMP9]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]]
13-
; NEON: [[LOOP_PREHEADER]]:
14-
; NEON-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[N]] to i64
1511
; NEON-NEXT: br label %[[LOOP:.*]]
16-
; NEON: [[EXIT_LOOPEXIT:.*]]:
17-
; NEON-NEXT: br label %[[EXIT]]
18-
; NEON: [[EXIT]]:
19-
; NEON-NEXT: [[T_0_LCSSA:%.*]] = phi i32 [ -1, %[[ENTRY]] ], [ [[SPEC_SELECT:%.*]], %[[EXIT_LOOPEXIT]] ]
20-
; NEON-NEXT: ret i32 [[T_0_LCSSA]]
2112
; NEON: [[LOOP]]:
22-
; NEON-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[LOOP_PREHEADER]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
23-
; NEON-NEXT: [[T_010:%.*]] = phi i32 [ -1, %[[LOOP_PREHEADER]] ], [ [[SPEC_SELECT]], %[[LOOP]] ]
13+
; NEON-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
14+
; NEON-NEXT: [[T_010:%.*]] = phi i32 [ -1, %[[ENTRY]] ], [ [[SPEC_SELECT:%.*]], %[[LOOP]] ]
2415
; NEON-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[DATA]], i64 [[IV]]
2516
; NEON-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2617
; NEON-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A]], [[TMP7]]
2718
; NEON-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i32 [[TMP7]], i32 [[T_010]]
2819
; NEON-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
29-
; NEON-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT]]
30-
; NEON-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_LOOPEXIT]], label %[[LOOP]]
20+
; NEON-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
21+
; NEON-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT:.*]], label %[[LOOP]]
22+
; NEON: [[EXIT]]:
23+
; NEON-NEXT: ret i32 [[SPEC_SELECT]]
3124
;
3225
; SVE-LABEL: define i32 @simple_csa_int_select(
33-
; SVE-SAME: i32 [[N:%.*]], ptr [[DATA:%.*]], i32 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
26+
; SVE-SAME: i64 [[N:%.*]], ptr [[DATA:%.*]], i32 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
3427
; SVE-NEXT: [[ENTRY:.*]]:
3528
; SVE-NEXT: [[A_FR:%.*]] = freeze i32 [[A]]
36-
; SVE-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N]], 0
37-
; SVE-NEXT: br i1 [[CMP9]], label %[[LOOP_PREHEADER:.*]], label %[[EXIT:.*]]
38-
; SVE: [[LOOP_PREHEADER]]:
39-
; SVE-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[N]] to i64
4029
; SVE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
4130
; SVE-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2
42-
; SVE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ugt i64 [[TMP1]], [[WIDE_TRIP_COUNT]]
31+
; SVE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP1]]
4332
; SVE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
4433
; SVE: [[VECTOR_PH]]:
4534
; SVE-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
4635
; SVE-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP2]], 2
47-
; SVE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], [[TMP3]]
48-
; SVE-NEXT: [[N_VEC:%.*]] = sub nsw i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]]
36+
; SVE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]]
37+
; SVE-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
4938
; SVE-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> zeroinitializer, i32 [[A_FR]], i64 0
5039
; SVE-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
5140
; SVE-NEXT: br label %[[VECTOR_BODY:.*]]
@@ -66,54 +55,39 @@ define i32 @simple_csa_int_select(i32 %N, ptr %data, i32 %a) {
6655
; SVE: [[MIDDLE_BLOCK]]:
6756
; SVE-NEXT: [[TMP10:%.*]] = call i32 @llvm.experimental.vector.extract.last.active.nxv4i32(<vscale x 4 x i32> [[TMP8]], <vscale x 4 x i1> [[TMP7]], i32 -1)
6857
; SVE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_MOD_VF]], 0
69-
; SVE-NEXT: br i1 [[CMP_N]], label %[[EXIT_LOOPEXIT:.*]], label %[[SCALAR_PH]]
58+
; SVE-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
7059
; SVE: [[SCALAR_PH]]:
71-
; SVE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[LOOP_PREHEADER]] ]
72-
; SVE-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ -1, %[[LOOP_PREHEADER]] ]
60+
; SVE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
61+
; SVE-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ [[TMP10]], %[[MIDDLE_BLOCK]] ], [ -1, %[[ENTRY]] ]
7362
; SVE-NEXT: br label %[[LOOP:.*]]
74-
; SVE: [[EXIT_LOOPEXIT]]:
75-
; SVE-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i32 [ [[SPEC_SELECT:%.*]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]
76-
; SVE-NEXT: br label %[[EXIT]]
77-
; SVE: [[EXIT]]:
78-
; SVE-NEXT: [[T_0_LCSSA:%.*]] = phi i32 [ -1, %[[ENTRY]] ], [ [[SPEC_SELECT_LCSSA]], %[[EXIT_LOOPEXIT]] ]
79-
; SVE-NEXT: ret i32 [[T_0_LCSSA]]
8063
; SVE: [[LOOP]]:
8164
; SVE-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
82-
; SVE-NEXT: [[T_010:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SPEC_SELECT]], %[[LOOP]] ]
65+
; SVE-NEXT: [[T_010:%.*]] = phi i32 [ [[BC_MERGE_RDX]], %[[SCALAR_PH]] ], [ [[SPEC_SELECT:%.*]], %[[LOOP]] ]
8366
; SVE-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[DATA]], i64 [[IV]]
8467
; SVE-NEXT: [[TMP13:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
8568
; SVE-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A_FR]], [[TMP13]]
8669
; SVE-NEXT: [[SPEC_SELECT]] = select i1 [[CMP1]], i32 [[TMP13]], i32 [[T_010]]
8770
; SVE-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
88-
; SVE-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT]]
89-
; SVE-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT_LOOPEXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
71+
; SVE-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
72+
; SVE-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
73+
; SVE: [[EXIT]]:
74+
; SVE-NEXT: [[SPEC_SELECT_LCSSA:%.*]] = phi i32 [ [[SPEC_SELECT]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]
75+
; SVE-NEXT: ret i32 [[SPEC_SELECT_LCSSA]]
9076
;
9177
entry:
92-
%cmp9 = icmp sgt i32 %N, 0
93-
br i1 %cmp9, label %loop.preheader, label %exit
94-
95-
loop.preheader: ; preds = %entry
96-
%wide.trip.count = zext i32 %N to i64
9778
br label %loop
9879

99-
exit: ; preds = %loop, %entry
100-
%t.0.lcssa = phi i32 [ -1, %entry ], [ %spec.select, %loop ]
101-
ret i32 %t.0.lcssa
102-
103-
loop: ; preds = %loop.preheader, %loop
104-
%iv = phi i64 [ 0, %loop.preheader ], [ %iv.next, %loop ]
105-
%t.010 = phi i32 [ -1, %loop.preheader ], [ %spec.select, %loop ]
106-
%arrayidx = getelementptr inbounds i32, ptr %data, i64 %iv
107-
%0 = load i32, ptr %arrayidx, align 4
108-
%cmp1 = icmp slt i32 %a, %0
109-
%spec.select = select i1 %cmp1, i32 %0, i32 %t.010
80+
loop:
81+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
82+
%data.phi = phi i32 [ -1, %entry ], [ %select.data, %loop ]
83+
%ld.addr = getelementptr inbounds i32, ptr %data, i64 %iv
84+
%ld = load i32, ptr %ld.addr, align 4
85+
%select.cmp = icmp slt i32 %a, %ld
86+
%select.data = select i1 %select.cmp, i32 %ld, i32 %data.phi
11087
%iv.next = add nuw nsw i64 %iv, 1
111-
%exitcond.not = icmp eq i64 %iv.next, %wide.trip.count
112-
br i1 %exitcond.not, label %exit, label %loop
88+
%exit.cmp = icmp eq i64 %iv.next, %N
89+
br i1 %exit.cmp, label %exit, label %loop
90+
91+
exit:
92+
ret i32 %select.data
11393
}
114-
;.
115-
; SVE: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
116-
; SVE: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
117-
; SVE: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
118-
; SVE: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
119-
;.

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