[PowerPC] Fixup tests for no libcalls for copysignl

Author: workingjubilee

llvm/test/CodeGen/PowerPC/copysignl.ll

@@ -43,31 +43,26 @@ declare double @copysign(double, double) #0
 define ppc_fp128 @foo_ll(double %a, ppc_fp128 %b) #0 {
 ; CHECK-LABEL: foo_ll:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    stdu 1, -112(1)
-; CHECK-NEXT:    fmr 3, 2
-; CHECK-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
-; CHECK-NEXT:    std 0, 128(1)
-; CHECK-NEXT:    lfs 2, .LCPI2_0@toc@l(3)
-; CHECK-NEXT:    bl copysignl
-; CHECK-NEXT:    nop
-; CHECK-NEXT:    addi 1, 1, 112
-; CHECK-NEXT:    ld 0, 16(1)
-; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    fcpsgn 0, 2, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 8
+; CHECK-NEXT:    fcmpu 0, 1, 0
+; CHECK-NEXT:    fmr 1, 0
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    addis 4, 2, .LCPI2_0@toc@ha
+; CHECK-NEXT:    addi 4, 4, .LCPI2_0@toc@l
+; CHECK-NEXT:    lfdx 2, 4, 3
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-VSX-LABEL: foo_ll:
 ; CHECK-VSX:       # %bb.0: # %entry
-; CHECK-VSX-NEXT:    mflr 0
-; CHECK-VSX-NEXT:    stdu 1, -112(1)
-; CHECK-VSX-NEXT:    fmr 3, 2
+; CHECK-VSX-NEXT:    fmr 0, 1
+; CHECK-VSX-NEXT:    xscpsgndp 1, 2, 1
 ; CHECK-VSX-NEXT:    xxlxor 2, 2, 2
-; CHECK-VSX-NEXT:    std 0, 128(1)
-; CHECK-VSX-NEXT:    bl copysignl
-; CHECK-VSX-NEXT:    nop
-; CHECK-VSX-NEXT:    addi 1, 1, 112
-; CHECK-VSX-NEXT:    ld 0, 16(1)
-; CHECK-VSX-NEXT:    mtlr 0
+; CHECK-VSX-NEXT:    xscmpudp 0, 0, 1
+; CHECK-VSX-NEXT:    beqlr 0
+; CHECK-VSX-NEXT:  # %bb.1: # %entry
+; CHECK-VSX-NEXT:    xsnegdp 2, 2
 ; CHECK-VSX-NEXT:    blr
 entry:
   %conv = fpext double %a to ppc_fp128
@@ -78,31 +73,26 @@ entry:
 define ppc_fp128 @foo_ld(double %a, double %b) #0 {
 ; CHECK-LABEL: foo_ld:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    stdu 1, -112(1)
-; CHECK-NEXT:    fmr 3, 2
-; CHECK-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-NEXT:    std 0, 128(1)
-; CHECK-NEXT:    lfs 2, .LCPI3_0@toc@l(3)
-; CHECK-NEXT:    bl copysignl
-; CHECK-NEXT:    nop
-; CHECK-NEXT:    addi 1, 1, 112
-; CHECK-NEXT:    ld 0, 16(1)
-; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    fcpsgn 0, 2, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 8
+; CHECK-NEXT:    fcmpu 0, 1, 0
+; CHECK-NEXT:    fmr 1, 0
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    addis 4, 2, .LCPI3_0@toc@ha
+; CHECK-NEXT:    addi 4, 4, .LCPI3_0@toc@l
+; CHECK-NEXT:    lfdx 2, 4, 3
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-VSX-LABEL: foo_ld:
 ; CHECK-VSX:       # %bb.0: # %entry
-; CHECK-VSX-NEXT:    mflr 0
-; CHECK-VSX-NEXT:    stdu 1, -112(1)
-; CHECK-VSX-NEXT:    fmr 3, 2
+; CHECK-VSX-NEXT:    fmr 0, 1
+; CHECK-VSX-NEXT:    xscpsgndp 1, 2, 1
 ; CHECK-VSX-NEXT:    xxlxor 2, 2, 2
-; CHECK-VSX-NEXT:    std 0, 128(1)
-; CHECK-VSX-NEXT:    bl copysignl
-; CHECK-VSX-NEXT:    nop
-; CHECK-VSX-NEXT:    addi 1, 1, 112
-; CHECK-VSX-NEXT:    ld 0, 16(1)
-; CHECK-VSX-NEXT:    mtlr 0
+; CHECK-VSX-NEXT:    xscmpudp 0, 0, 1
+; CHECK-VSX-NEXT:    beqlr 0
+; CHECK-VSX-NEXT:  # %bb.1: # %entry
+; CHECK-VSX-NEXT:    xsnegdp 2, 2
 ; CHECK-VSX-NEXT:    blr
 entry:
   %conv = fpext double %a to ppc_fp128
@@ -114,31 +104,26 @@ entry:
 define ppc_fp128 @foo_lf(double %a, float %b) #0 {
 ; CHECK-LABEL: foo_lf:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    stdu 1, -112(1)
-; CHECK-NEXT:    fmr 3, 2
-; CHECK-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
-; CHECK-NEXT:    std 0, 128(1)
-; CHECK-NEXT:    lfs 2, .LCPI4_0@toc@l(3)
-; CHECK-NEXT:    bl copysignl
-; CHECK-NEXT:    nop
-; CHECK-NEXT:    addi 1, 1, 112
-; CHECK-NEXT:    ld 0, 16(1)
-; CHECK-NEXT:    mtlr 0
+; CHECK-NEXT:    fcpsgn 0, 2, 1
+; CHECK-NEXT:    li 3, 0
+; CHECK-NEXT:    li 4, 8
+; CHECK-NEXT:    fcmpu 0, 1, 0
+; CHECK-NEXT:    fmr 1, 0
+; CHECK-NEXT:    iseleq 3, 4, 3
+; CHECK-NEXT:    addis 4, 2, .LCPI4_0@toc@ha
+; CHECK-NEXT:    addi 4, 4, .LCPI4_0@toc@l
+; CHECK-NEXT:    lfdx 2, 4, 3
 ; CHECK-NEXT:    blr
 ;
 ; CHECK-VSX-LABEL: foo_lf:
 ; CHECK-VSX:       # %bb.0: # %entry
-; CHECK-VSX-NEXT:    mflr 0
-; CHECK-VSX-NEXT:    stdu 1, -112(1)
-; CHECK-VSX-NEXT:    fmr 3, 2
+; CHECK-VSX-NEXT:    fmr 0, 1
+; CHECK-VSX-NEXT:    fcpsgn 1, 2, 1
 ; CHECK-VSX-NEXT:    xxlxor 2, 2, 2
-; CHECK-VSX-NEXT:    std 0, 128(1)
-; CHECK-VSX-NEXT:    bl copysignl
-; CHECK-VSX-NEXT:    nop
-; CHECK-VSX-NEXT:    addi 1, 1, 112
-; CHECK-VSX-NEXT:    ld 0, 16(1)
-; CHECK-VSX-NEXT:    mtlr 0
+; CHECK-VSX-NEXT:    xscmpudp 0, 0, 1
+; CHECK-VSX-NEXT:    beqlr 0
+; CHECK-VSX-NEXT:  # %bb.1: # %entry
+; CHECK-VSX-NEXT:    xsnegdp 2, 2
 ; CHECK-VSX-NEXT:    blr
 entry:
   %conv = fpext double %a to ppc_fp128

llvm/test/CodeGen/PowerPC/ctrloop-cpsgn.ll

@@ -89,100 +89,59 @@ entry:
 }
 
 define i128 @test_copysign(ppc_fp128 %x, ppc_fp128 %y) nounwind  {
-; PPC64-P8-LE-LABEL: test_copysign:
-; PPC64-P8-LE:       # %bb.0: # %entry
-; PPC64-P8-LE-NEXT:    mflr 0
-; PPC64-P8-LE-NEXT:    stdu 1, -32(1)
-; PPC64-P8-LE-NEXT:    std 0, 48(1)
-; PPC64-P8-LE-NEXT:    bl copysignl
-; PPC64-P8-LE-NEXT:    nop
-; PPC64-P8-LE-NEXT:    mffprd 3, 1
-; PPC64-P8-LE-NEXT:    mffprd 4, 2
-; PPC64-P8-LE-NEXT:    addi 1, 1, 32
-; PPC64-P8-LE-NEXT:    ld 0, 16(1)
-; PPC64-P8-LE-NEXT:    mtlr 0
-; PPC64-P8-LE-NEXT:    blr
-;
-; PPC64-LE-LABEL: test_copysign:
-; PPC64-LE:       # %bb.0: # %entry
-; PPC64-LE-NEXT:    mflr 0
-; PPC64-LE-NEXT:    stdu 1, -48(1)
-; PPC64-LE-NEXT:    std 0, 64(1)
-; PPC64-LE-NEXT:    bl copysignl
-; PPC64-LE-NEXT:    nop
-; PPC64-LE-NEXT:    stfd 1, 32(1)
-; PPC64-LE-NEXT:    stfd 2, 40(1)
-; PPC64-LE-NEXT:    ld 3, 32(1)
-; PPC64-LE-NEXT:    ld 4, 40(1)
-; PPC64-LE-NEXT:    addi 1, 1, 48
-; PPC64-LE-NEXT:    ld 0, 16(1)
-; PPC64-LE-NEXT:    mtlr 0
-; PPC64-LE-NEXT:    blr
-;
-; PPC64-P8-BE-LABEL: test_copysign:
-; PPC64-P8-BE:       # %bb.0: # %entry
-; PPC64-P8-BE-NEXT:    mflr 0
-; PPC64-P8-BE-NEXT:    stdu 1, -112(1)
-; PPC64-P8-BE-NEXT:    std 0, 128(1)
-; PPC64-P8-BE-NEXT:    bl copysignl
-; PPC64-P8-BE-NEXT:    nop
-; PPC64-P8-BE-NEXT:    mffprd 3, 1
-; PPC64-P8-BE-NEXT:    mffprd 4, 2
-; PPC64-P8-BE-NEXT:    addi 1, 1, 112
-; PPC64-P8-BE-NEXT:    ld 0, 16(1)
-; PPC64-P8-BE-NEXT:    mtlr 0
-; PPC64-P8-BE-NEXT:    blr
+; PPC64-P8-LABEL: test_copysign:
+; PPC64-P8:       # %bb.0: # %entry
+; PPC64-P8-NEXT:    xscpsgndp 0, 3, 1
+; PPC64-P8-NEXT:    xscmpudp 0, 1, 0
+; PPC64-P8-NEXT:    beq 0, .LBB2_2
+; PPC64-P8-NEXT:  # %bb.1: # %entry
+; PPC64-P8-NEXT:    xsnegdp 2, 2
+; PPC64-P8-NEXT:  .LBB2_2: # %entry
+; PPC64-P8-NEXT:    mffprd 3, 0
+; PPC64-P8-NEXT:    mffprd 4, 2
+; PPC64-P8-NEXT:    blr
 ;
-; PPC64-BE-LABEL: test_copysign:
-; PPC64-BE:       # %bb.0: # %entry
-; PPC64-BE-NEXT:    mflr 0
-; PPC64-BE-NEXT:    stdu 1, -128(1)
-; PPC64-BE-NEXT:    std 0, 144(1)
-; PPC64-BE-NEXT:    bl copysignl
-; PPC64-BE-NEXT:    nop
-; PPC64-BE-NEXT:    stfd 1, 112(1)
-; PPC64-BE-NEXT:    stfd 2, 120(1)
-; PPC64-BE-NEXT:    ld 3, 112(1)
-; PPC64-BE-NEXT:    ld 4, 120(1)
-; PPC64-BE-NEXT:    addi 1, 1, 128
-; PPC64-BE-NEXT:    ld 0, 16(1)
-; PPC64-BE-NEXT:    mtlr 0
-; PPC64-BE-NEXT:    blr
+; PPC64-LABEL: test_copysign:
+; PPC64:       # %bb.0: # %entry
+; PPC64-NEXT:    xscpsgndp 0, 3, 1
+; PPC64-NEXT:    xscmpudp 0, 1, 0
+; PPC64-NEXT:    beq 0, .LBB2_2
+; PPC64-NEXT:  # %bb.1: # %entry
+; PPC64-NEXT:    xsnegdp 2, 2
+; PPC64-NEXT:  .LBB2_2: # %entry
+; PPC64-NEXT:    stfd 0, -16(1)
+; PPC64-NEXT:    stfd 2, -8(1)
+; PPC64-NEXT:    ld 3, -16(1)
+; PPC64-NEXT:    ld 4, -8(1)
+; PPC64-NEXT:    blr
 ;
 ; PPC32-LABEL: test_copysign:
 ; PPC32:       # %bb.0: # %entry
-; PPC32-NEXT:    mflr 0
-; PPC32-NEXT:    stwu 1, -80(1)
-; PPC32-NEXT:    stw 0, 84(1)
-; PPC32-NEXT:    stfd 1, 32(1)
-; PPC32-NEXT:    lwz 3, 36(1)
-; PPC32-NEXT:    stfd 2, 24(1)
-; PPC32-NEXT:    stw 3, 52(1)
-; PPC32-NEXT:    lwz 3, 32(1)
-; PPC32-NEXT:    stfd 3, 56(1)
-; PPC32-NEXT:    stw 3, 48(1)
-; PPC32-NEXT:    lwz 3, 28(1)
-; PPC32-NEXT:    lfd 4, 64(1)
-; PPC32-NEXT:    stw 3, 44(1)
-; PPC32-NEXT:    lwz 3, 24(1)
-; PPC32-NEXT:    lfd 1, 48(1)
-; PPC32-NEXT:    stw 3, 40(1)
-; PPC32-NEXT:    lwz 3, 60(1)
-; PPC32-NEXT:    lfd 2, 40(1)
-; PPC32-NEXT:    stw 3, 76(1)
-; PPC32-NEXT:    lwz 3, 56(1)
-; PPC32-NEXT:    stw 3, 72(1)
-; PPC32-NEXT:    lfd 3, 72(1)
-; PPC32-NEXT:    bl copysignl
-; PPC32-NEXT:    stfd 1, 8(1)
+; PPC32-NEXT:    stwu 1, -32(1)
+; PPC32-NEXT:    stfd 3, 8(1)
+; PPC32-NEXT:    lbz 3, 8(1)
+; PPC32-NEXT:    srwi 3, 3, 7
+; PPC32-NEXT:    andi. 3, 3, 1
+; PPC32-NEXT:    bc 12, 1, .LBB2_2
+; PPC32-NEXT:  # %bb.1: # %entry
+; PPC32-NEXT:    fabs 0, 1
+; PPC32-NEXT:    fcmpu 0, 1, 0
+; PPC32-NEXT:    bne 0, .LBB2_3
+; PPC32-NEXT:    b .LBB2_4
+; PPC32-NEXT:  .LBB2_2:
+; PPC32-NEXT:    fnabs 0, 1
+; PPC32-NEXT:    fcmpu 0, 1, 0
+; PPC32-NEXT:    beq 0, .LBB2_4
+; PPC32-NEXT:  .LBB2_3: # %entry
+; PPC32-NEXT:    fneg 2, 2
+; PPC32-NEXT:  .LBB2_4: # %entry
+; PPC32-NEXT:    stfd 0, 24(1)
 ; PPC32-NEXT:    stfd 2, 16(1)
-; PPC32-NEXT:    lwz 3, 8(1)
-; PPC32-NEXT:    lwz 4, 12(1)
+; PPC32-NEXT:    lwz 3, 24(1)
+; PPC32-NEXT:    lwz 4, 28(1)
 ; PPC32-NEXT:    lwz 5, 16(1)
 ; PPC32-NEXT:    lwz 6, 20(1)
-; PPC32-NEXT:    lwz 0, 84(1)
-; PPC32-NEXT:    addi 1, 1, 80
-; PPC32-NEXT:    mtlr 0
+; PPC32-NEXT:    addi 1, 1, 32
 ; PPC32-NEXT:    blr
 entry:
 	%0 = tail call ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128 %x, ppc_fp128 %y)
@@ -236,3 +195,8 @@ entry:
 
 declare ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128)
 declare ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128, ppc_fp128)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; PPC64-BE: {{.*}}
+; PPC64-LE: {{.*}}
+; PPC64-P8-BE: {{.*}}
+; PPC64-P8-LE: {{.*}}