Emit third operand for the rdhwr instruction on MIPS64 < R6

[atanasyan]

Bugzilla Link	38861
Resolution	FIXED
Resolved on	Nov 15, 2018 21:23
Version	trunk
OS	All
Blocks	#38454
CC	@jrtc27,@sylvestre,@tstellar
Fixed by commit(s)	r341919 r346739

Extended Description

MIPS ISAs before "Revision 6" do not support third operand for the rdhwr instruction. But LLVM generates three-operands version of the instruction on any MIPS64 ISAs. This is regression caused by r335162.

% cat test.ll
declare i8* @​llvm.thread.pointer() nounwind readnone

define i8* @​thread_pointer() {
%1 = tail call i8* @​llvm.thread.pointer()
ret i8* %1
}

% llc -march=mips64 < test.ll
...
rdhwr $3, $29, 0

% llc -march=mips < test.ll
...
rdhwr $3, $29

[atanasyan]

assigned to @atanasyan

[atanasyan]

Fixed at r341919.
https://reviews.llvm.org/rL341919

[jrtc27]

This affects the release_70 branch; could it please be cherry-picked?

[sylvestre]

yeah, we should back port it. I have been affected by this in the debian packaging.

[atanasyan]

Sure. I'm going to send request on backporting this and some other MIPS-related commits soon.

[tstellar]

mentioned in issue #38454

[atanasyan]

mentioned in issue llvm/llvm-bugzilla-archive#39611