-
Notifications
You must be signed in to change notification settings - Fork 13k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Support -mstack-protector-guard=sysreg for riscv #46685
Comments
SelectionDAGBuilder::visitSPDescriptorParent is probably the most relevant method for this. I'm not sure yet how best to modify getLoadStackGuard in order to change this from a load of a global Value to an aarch64 specific Here's a basic test case demonstrating the differences between these 3 new flags, vs without them (but still with -fstack-protector-strong). |
Ah looks like I can just add custom expansion for AArch64::LOAD_STACK_GUARD in AArch64InstrInfo::expandPostRAPseudo() and that seems to work. |
aarch64: https://reviews.llvm.org/D100919 |
https://reviews.llvm.org/rG0f417789192e74f9d2fad0f6aee4efc394257176 has landed for aarch64 with the caveats that we only support sp_el0 for valid sysreg, and we don't try too hard to support arbitrary int32_t's for offsets. |
For the Linux kernel, it looks like risc-v uses -mstack-protector-guard=tls It looks like ppc uses: -mstack-protector-guard=tls x86 uses: -mstack-protector-guard-reg=fs See #48553 for -mstack-protector-guard-symbol=. |
mentioned in issue llvm/llvm-bugzilla-archive#49209 |
@llvm/issue-subscribers-clang-driver |
cc @asb |
@llvm/issue-subscribers-backend-risc-v |
Extended Description
The Linux kernel uses this for having a per-thread stack canary. Implementing this for both arm64 and riscv is desired.
For example, gcc's arm64 support is used like this in the kernel:
-mstack-protector-guard=sysreg
-mstack-protector-guard-reg=sp_el0
-mstack-protector-guard-offset=0
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0a1213fa7432778b71a1c0166bf56660a3aab030
Here are discussions on the start of riscv support:
https://lore.kernel.org/lkml/CAJF2gTTr_ENhGRmjqNbGBhEc8y4D3YSqAResvwHuB1ykemKTUw@mail.gmail.com/
The text was updated successfully, but these errors were encountered: