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Error address for instruction adrp in JIT compilation #87904

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cfg1234 opened this issue Apr 7, 2024 · 3 comments
Open

Error address for instruction adrp in JIT compilation #87904

cfg1234 opened this issue Apr 7, 2024 · 3 comments
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@cfg1234
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cfg1234 commented Apr 7, 2024

Affected version: 15.0.4,17.0.6,18.1.3
Machine type: AArch64
Here is the part of the IR code:

define dso_local noalias nonnull ptr @getExecution() local_unnamed_addr #0 {
entry:
%call = tail call noalias noundef nonnull dereferenceable(96) ptr @_Znwm(i64 noundef 96) #9
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(96) %call, i8 0, i64 96, i1 false)
store ptr getelementptr inbounds ({ [8 x ptr] }, ptr @_ZTVN3com4my4plan14MyImpl4E, i64 0, inrange i32 0, i64 2), ptr %call, align 8, !tbaa !2
ret ptr %call
}

When the JIT is used to compile the code, there is a low probability that the address offset of the adrp instruction is incorrect:

correct machine code example:
0: f81f0ffe str x30, [sp, #-16]!
4: 52801000 mov w0, #0x80 // #128
8: 9400000e bl 38 <_Znwm+0x38>
c: b0117fe8 adrp x8, 22ffd000 <getExecution+0x22ffd000>
10: 6f00e400 movi v0.2d, #0x0
14: f9400108 ldr x8, [x8]
18: 3d801c00 str q0, [x0, #112]
1c: ad008000 stp q0, q0, [x0, #16]

wrong machine code example:
0: f81f0ffe str x30, [sp, #-16]!
4: 52801000 mov w0, #0x80 // #128
8: 9400000e bl 38 <_Znwm+0x38>
c: d0ffffe8 adrp x8, ffffffffffffe000 <getExecution+0xffffffffffffe000>
10: 6f00e400 movi v0.2d, #0x0
14: f9400108 ldr x8, [x8]
18: 3d801c00 str q0, [x0, #112]
1c: ad008000 stp q0, q0, [x0, #16]

@llvmbot
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llvmbot commented Apr 7, 2024

@llvm/issue-subscribers-orcjit

Author: None (cfg1234)

Affected version: 15.0.4 Machine type: AArch64 Here is the part of the IR code:

define dso_local noalias nonnull ptr @getExecution() local_unnamed_addr #0 {
entry:
%call = tail call noalias noundef nonnull dereferenceable(96) ptr @_Znwm(i64 noundef 96) #9
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(96) %call, i8 0, i64 96, i1 false)
store ptr getelementptr inbounds ({ [8 x ptr] }, ptr @_ZTVN3com4my4plan14MyImpl4E, i64 0, inrange i32 0, i64 2), ptr %call, align 8, !tbaa !2
ret ptr %call
}

When the JIT is used to compile the code, there is a low probability that the address offset of the adrp instruction is incorrect:

correct machine code example:
0: f81f0ffe str x30, [sp, #-16]!
4: 52801000 mov w0, #0x80 // #128
8: 9400000e bl 38 <_Znwm+0x38>
c: b0117fe8 adrp x8, 22ffd000 <getExecution+0x22ffd000>
10: 6f00e400 movi v0.2d, #0x0
14: f9400108 ldr x8, [x8]
18: 3d801c00 str q0, [x0, #112]
1c: ad008000 stp q0, q0, [x0, #16]

wrong machine code example:
0: f81f0ffe str x30, [sp, #-16]!
4: 52801000 mov w0, #0x80 // #128
8: 9400000e bl 38 <_Znwm+0x38>
c: d0ffffe8 adrp x8, ffffffffffffe000 <getExecution+0xffffffffffffe000>
10: 6f00e400 movi v0.2d, #0x0
14: f9400108 ldr x8, [x8]
18: 3d801c00 str q0, [x0, #112]
1c: ad008000 stp q0, q0, [x0, #16]

@EugeneZelenko
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Could you please try 18 or main branch?

@cfg1234
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cfg1234 commented Apr 22, 2024

Tried 17.0.6 and 18.1.3,problem still exists with lower probability.

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