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[test-triage] chip_sw_csrng_edn_concurrency_reduced_freq #24579

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elliotb-lowrisc opened this issue Sep 16, 2024 · 0 comments
Open

[test-triage] chip_sw_csrng_edn_concurrency_reduced_freq #24579

elliotb-lowrisc opened this issue Sep 16, 2024 · 0 comments

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@elliotb-lowrisc
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elliotb-lowrisc commented Sep 16, 2024

Hierarchy of regression failure

Chip Level

Failure Description

After running for 2.5 hrs:

UVM_INFO @  10.180001 us: (tb.sv:470) [mem_bkdr_util[FlashBank0Data]] Loading mem from file:
csrng_edn_concurrency_test_sim_dv.64.scr.vmem
UVM_INFO @ 1479.922608 us: (sw_logger_if.sv:524) [test_rom_sim_dv(sw/device/lib/testing/test_framework/status.c:40)] test_status_set to 0xb090
UVM_INFO @ 1480.329333 us: (sw_test_status_if.sv:61) [tb.u_sim_sram.u_sim_sram_if.u_sw_test_status_if] SW test transitioned to SwTestStatusInBootRom.
UVM_INFO @ 1712.150143 us: (sw_logger_if.sv:524) [test_rom_sim_dv(sw/device/lib/testing/test_rom/test_rom.c:158)] kChipInfo: scm_revision=54697461
UVM_INFO @ 1721.142300 us: (sw_logger_if.sv:524) [test_rom_sim_dv(sw/device/lib/testing/test_rom/test_rom.c:230)] Test ROM complete, jumping to flash (addr: 20000480)!
UVM_INFO @ 1744.942862 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(w/device/lib/testing/test_framework/status.c:40)] test_status_set to 0x4354
UVM_INFO @ 1745.381006 us: (sw_test_status_if.sv:61) [tb.u_sim_sram.u_sim_sram_if.u_sw_test_status_if] SW test transitioned to SwTestStatusInTest.
UVM_INFO @ 3082.926515 us: (sw_logger_if.sv:369) [tb.u_sim_sram.u_sim_sram_if.u_sw_logger_if.construct_log_and_print.unnamed$$_0.unnamed$$_1.unnamed$$_2.isolation_thread.unnamed$$_0.unnamed$$_1] String arg at addr 20008c7a: Setup
UVM_INFO @ 3082.926515 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:431)] Test state: Setup
UVM_INFO @ 3145.860267 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:355)] Generating EDN and CSRNG params
UVM_INFO @ 56658.033774 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:417)] Continuing without esfinal FIFO being full
UVM_INFO @ 56661.118332 us: (sw_logger_if.sv:369) [tb.u_sim_sram.u_sim_sram_if.u_sw_logger_if.construct_log_and_print.unnamed$$_0.unnamed$$_1.unnamed$$_2.isolation_thread.unnamed$$_0.unnamed$$_1] String arg at addr 20008c80: Run
UVM_INFO @ 56661.118332 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:431)] Test state: Run
UVM_INFO @ 56668.999568 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:191)] OTBN:START
UVM_INFO @ 56790.462026 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:223)] Ibex:START
UVM_INFO @ 56801.416361 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:267)] AES:START
UVM_INFO @ 56809.708746 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:301)] CSRNG:START
UVM_INFO @ 58138.217067 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:244)] Ibex:DONE
UVM_INFO @ 65370.667421 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:340)] CSRNG:DONE
UVM_INFO @ 76062.601618 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:278)] AES:DONE
UVM_INFO @ 81625.226361 us: (sw_logger_if.sv:524) [csrng_edn_concurrency_test_sim_dv(sw/device/tests/csrng_edn_concurrency_test.c:201)] OTBN:DONE
UVM_ERROR @ 81654.063957 us: (sw_logger_if.sv:526) [csrng_edn_concurrency_test_sim_dv(w/device/lib/testing/entropy_testutils.c:280)] end0 error status. err: 0x10, fifo_err: 0x2

Steps to Reproduce

  • GitHub Revision: 25b1acb
  • dvsim invocation command to reproduce the failure, inclusive of build and run seeds: util/dvsim/dvsim.py hw/top_earlgrey/dv/chip_sim_cfg.hjson -i chip_sw_csrng_edn_concurrency_reduced_freq --build-seed 115096073277204595231937901342804627564470767004707790242822318429579153097636 --seed 91706786475523516705574362940866814675671117454379635178044453398029158584417 -r1

Tests with similar or related failures

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