Skip to content

Commit b7f5170

Browse files
committed
[ot] docs/opentitan: uart.md: Add UART documentation
Separate out the UART documentation from the Earlgrey and Darjeeling machine documentation files into its own seperate documentation file (like the `spi_device.md`) and describe in more detail sending break conditions via the QEMU monitor and using the properties to mock break conditions in the oversampled `VAL` register for SW edge cases. Signed-off-by: Alex Jones <alex.jones@lowrisc.org>
1 parent 3ca69fd commit b7f5170

File tree

3 files changed

+43
-20
lines changed

3 files changed

+43
-20
lines changed

docs/opentitan/darjeeling.md

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -305,16 +305,6 @@ To limit the reboot cyckes, use the `-global ot-rstmgr.fatal_reset=<N>` option,
305305
unsigned integer. This option forces the QEMU VM to exit the N^th^ time the reset manager receives
306306
a reset request, rather than rebooting the whole machine endlessly as the default behavior.
307307

308-
### UART
309-
310-
* `-serial mon:stdio`, used as the first `-serial` option, redirects the virtual UART0 to the
311-
current console/shell.
312-
313-
* `-chardev socket,id=serial1,host=localhost,port=8001,server=on,wait=off` and
314-
`-serial chardev:serial1` can be used to redirect UART1 (in this example) to a TCP socket. These
315-
options are not specific to OpenTitan emulation, but are useful to communicate over a UART.
316-
Note that QEMU offers many `chardev` backends, please check QEMU documentation for details.
317-
318308
## Useful debugging options
319309

320310
### Device log traces

docs/opentitan/earlgrey.md

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -254,16 +254,6 @@ There are two modes to handle address remapping, with different limitations:
254254
best SPI Host transfer performances, but decreases accuracy of the SPI Host clock settings. Time
255255
should be specified in ns, and defaults to 0 that indicates automatic SPI bus clock management.
256256

257-
### UART
258-
259-
* `-serial mon:stdio`, used as the first `-serial` option, redirects the virtual UART0 to the
260-
current console/shell.
261-
262-
* `-chardev socket,id=serial1,host=localhost,port=8001,server=on,wait=off` and
263-
`-serial chardev:serial1` can be used to redirect UART1 (in this example) to a TCP socket. These
264-
options are not specific to OpenTitan emulation, but are useful to communicate over a UART.
265-
Note that QEMU offers many `chardev` backends, please check QEMU documentation for details.
266-
267257
### I2C
268258

269259
* `-device <name>,bus=<bus>,address=<address>` can be used to attach devices at a specific address

docs/opentitan/uart.md

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,43 @@
1+
# OpenTitan UART Support
2+
3+
## Connecting to the UART
4+
5+
* `-serial mon:stdio`, used as the first `-serial` option, redirects the virtual UART0 to the
6+
current console/shell.
7+
8+
* `-chardev socket,id=serial1,host=localhost,port=8001,server=on,wait=off` and
9+
`-serial chardev:serial1` can be used to redirect UART1 (in this example) to a TCP socket. These
10+
options are not specific to OpenTitan emulation, but are useful to communicate over a UART.
11+
Note that QEMU offers many `chardev` backends, please check QEMU documentation for details.
12+
13+
## Sending Break Conditions
14+
15+
Break conditions can be sent to the UART on select supported CharDev backends (telnet, mux)
16+
or by sending the `chardev-send-break` command with the CharDev ID via the QEMU Monitor.
17+
Break conditions are treated as transient events and the length of time of a break condition
18+
is not considered.
19+
20+
## Oversampling
21+
22+
OpenTitan's UART has a `VAL` register which oversamples the RX pin 16 times per bit.
23+
This cannot be emulated by QEMU which uses a CharDev backend and does not have a notion of
24+
accurate sampling times.
25+
26+
If software wishes to poll the `VAL` register to determine break conditions, there are
27+
some properties available to help with emulating this use case:
28+
29+
* `-global ot-uart.oversample-break=true` is used to enable UART break oversampling.
30+
This will attempt to display 16 samples of the last bit received in the `VAL` register,
31+
which will be 16 high bits after any UART frame is transmitted (as these end with a stop
32+
bit, which is high), or 16 low bits if the UART previously received a break condition
33+
and has not received any frames since. That is, enabling this property assumes that
34+
transmitted break conditions are "held" until the next UART transfer in terms of what
35+
is being shown in the oversampled `VAL` register.
36+
37+
* `-global ot-uart.toggle-break=true` is used to provide more control over "holding"
38+
the UART RX break condition like a GPIO strap, and changes the behavior of a UART
39+
such that received break condition events now *toggle* the break condition state
40+
rather than keeping it asserted until the next transfer. This allows any device talking
41+
to OpenTitan via UART to have more precise control over when the UART VAL register
42+
displays idle and when it displays a break condition, as it can precisely toggle the
43+
break condition on or off like a GPIO strapping being held down.

0 commit comments

Comments
 (0)