@@ -359,51 +359,46 @@ static bool isSafeToMove(const MachineInstr &From, const MachineInstr &To) {
359359 break ;
360360 }
361361 }
362- return From.isSafeToMove (nullptr , SawStore);
362+ return From.isSafeToMove (SawStore);
363363}
364364
365- static const RISCV::RISCVMaskedPseudoInfo *
366- lookupMaskedPseudoInfo (const MachineInstr &MI) {
365+ static std::optional< bool >
366+ lookupActiveElementsAffectsResult (const MachineInstr &MI) {
367367 const RISCV::RISCVMaskedPseudoInfo *Info =
368368 RISCV::lookupMaskedIntrinsicByUnmasked (MI.getOpcode ());
369369 if (!Info)
370370 Info = RISCV::getMaskedPseudoInfo (MI.getOpcode ());
371- return Info;
371+ if (!Info)
372+ return std::nullopt ;
373+ return Info->ActiveElementsAffectResult ;
372374}
373375
374- // / If a PseudoVMV_V_V is the only user of it's input, fold its passthru and VL
376+ // / If a PseudoVMV_V_V is the only user of its input, fold its passthru and VL
375377// / into it.
376378// /
377- // / %x = PseudoVADD_V_V_M1 %passthru, %a, %b, %vl , sew, policy
378- // / %y = PseudoVMV_V_V_M1 %passthru, %x, %vl , sew, policy
379+ // / %x = PseudoVADD_V_V_M1 %passthru, %a, %b, %vl1 , sew, policy
380+ // / %y = PseudoVMV_V_V_M1 %passthru, %x, %vl2 , sew, policy
379381// /
380382// / ->
381383// /
382- // / %y = PseudoVADD_V_V_M1 %passthru, %a, %b, %vl , sew, policy
384+ // / %y = PseudoVADD_V_V_M1 %passthru, %a, %b, min(vl1, vl2) , sew, policy
383385bool RISCVVectorPeephole::foldVMV_V_V (MachineInstr &MI) {
384386 if (RISCV::getRVVMCOpcode (MI.getOpcode ()) != RISCV::VMV_V_V)
385387 return false ;
386388
387389 MachineOperand &Passthru = MI.getOperand (1 );
388- MachineInstr *Src = MRI->getVRegDef (MI.getOperand (2 ).getReg ());
389390
390391 if (!MRI->hasOneUse (MI.getOperand (2 ).getReg ()))
391392 return false ;
392393
394+ MachineInstr *Src = MRI->getVRegDef (MI.getOperand (2 ).getReg ());
393395 if (!Src || Src->hasUnmodeledSideEffects () ||
394- Src->getParent () != MI.getParent ())
395- return false ;
396-
397- // Src needs to be a pseudo that's opted into this transform.
398- const RISCV::RISCVMaskedPseudoInfo *Info = lookupMaskedPseudoInfo (*Src);
399- if (!Info)
396+ Src->getParent () != MI.getParent () || Src->getNumDefs () != 1 ||
397+ !RISCVII::isFirstDefTiedToFirstUse (Src->getDesc ()) ||
398+ !RISCVII::hasVLOp (Src->getDesc ().TSFlags ) ||
399+ !RISCVII::hasVecPolicyOp (Src->getDesc ().TSFlags ))
400400 return false ;
401401
402- assert (Src->getNumDefs () == 1 &&
403- RISCVII::isFirstDefTiedToFirstUse (Src->getDesc ()) &&
404- RISCVII::hasVLOp (Src->getDesc ().TSFlags ) &&
405- RISCVII::hasVecPolicyOp (Src->getDesc ().TSFlags ));
406-
407402 // Src needs to have the same passthru as VMV_V_V
408403 if (Src->getOperand (1 ).getReg () != RISCV::NoRegister &&
409404 Src->getOperand (1 ).getReg () != Passthru.getReg ())
@@ -429,21 +424,27 @@ bool RISCVVectorPeephole::foldVMV_V_V(MachineInstr &MI) {
429424 bool VLChanged = !MinVL->isIdenticalTo (SrcVL);
430425 bool RaisesFPExceptions = MI.getDesc ().mayRaiseFPException () &&
431426 !MI.getFlag (MachineInstr::MIFlag::NoFPExcept);
432- if (VLChanged && (Info->ActiveElementsAffectResult || RaisesFPExceptions))
427+ auto ActiveElementsAffectResult = lookupActiveElementsAffectsResult (*Src);
428+ if (!ActiveElementsAffectResult)
429+ return false ;
430+ if (VLChanged && (*ActiveElementsAffectResult || RaisesFPExceptions))
433431 return false ;
434432
435433 if (!isSafeToMove (*Src, MI))
436434 return false ;
437435
438- // Move Src down to MI, then replace all uses of MI with it.
436+ // Move Src down to MI so it can access its passthru/VL, then replace all uses
437+ // of MI with it.
439438 Src->moveBefore (&MI);
440439
441- Src->getOperand (1 ).setReg (Passthru.getReg ());
442- // If Src is masked then its passthru needs to be in VRNoV0.
443- if (Passthru.getReg () != RISCV::NoRegister)
444- MRI->constrainRegClass (Passthru.getReg (),
445- TII->getRegClass (Src->getDesc (), 1 , TRI,
446- *Src->getParent ()->getParent ()));
440+ if (Src->getOperand (1 ).getReg () != Passthru.getReg ()) {
441+ Src->getOperand (1 ).setReg (Passthru.getReg ());
442+ // If Src is masked then its passthru needs to be in VRNoV0.
443+ if (Passthru.getReg () != RISCV::NoRegister)
444+ MRI->constrainRegClass (Passthru.getReg (),
445+ TII->getRegClass (Src->getDesc (), 1 , TRI,
446+ *Src->getParent ()->getParent ()));
447+ }
447448
448449 if (MinVL->isImm ())
449450 SrcVL.ChangeToImmediate (MinVL->getImm ());
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