kasli-soc RGMII vs SFP0

[jbqubit]

The default network interface on kasli-soc is the copper Ethernet with the RGMII chip. The default network interface on kasli (master and standalone) is SFP0.

Comments:

• For consistency across kasli variants make SFP0 the default on kasli-soc.
• The use of SPF permits use of optical fiber that breaks ground loops.
• Consider adding a .json option for choosing between SFP0 and RGMII for the upstream interface on kasli-soc.

[sbourdeauducq]

That does not seem worthwhile.

• It's quite a lot of work since a GTX PHY will need to be developed and interfaced with the PS MAC.
• RJ45 can be connected to SFP with a 10 USD media converter if needed.
• There are isolation transformers built-in (part of the Ethernet standard) which cause no ground loops even with RJ45 copper cables.

[jbqubit]

It's quite a lot of work since a GTX PHY will need to be developed and interfaced with the PS MAC.

Gotcha. I didn't take note that the SoC uses yet another gigabit transceiver family! Oh Xilinx... So none of the Kasli-SOC SFP are functional at the moment. Is there an issue for tracking GTX PHI development? Is it funded?

More broadly, is there an Issue for tracking the tasks for full support of Kasli-SOC by ARTIQ including eg merging kasli_soc and supporting it with artiq_flash.

There are isolation transformers built-in (part of the Ethernet standard) which cause no ground loops even with RJ45 copper cables.

I see. This looks to be built-in to the RJ-45 cage link. Nice.

[sbourdeauducq]

The kasli-soc SFPs can be used for DRTIO. Regardless of funding, it does not sound like a good use of scarce FPGA development expertise to use them for Ethernet.

[jbqubit]

Agreed that the RGMII approach to Ethernet seems fine. :)

More broadly, is there an Issue for tracking the tasks for full support of Kasli-SOC by ARTIQ including eg merging kasli_soc and supporting it with artiq_flash.

What about this question?

[sbourdeauducq]

More broadly, is there an Issue for tracking the tasks for full support of Kasli-SOC by ARTIQ

No sure what you mean by "full support". All ARTIQ features that you would expect function on Kasli-SoC already.

including eg merging kasli_soc

Gateware is easy to merge and most of it is just importing from ARTIQ anyway.

The firmware for Zynq (NAR3) is more modern than the one for RISC-V devices. It should eventually be ported to RISC-V and replace it. But this is a difficult project with objectively little pay-off, so this is not high on the priority list at the moment.

and supporting it with artiq_flash.

The startup process of Zynq devices (boot ROM built into the chip by Xilinx that initializes the CPU and loads the next bootloader from the SD card) is very different from FPGA devices so there is essentially nothing in common with the code that is in artiq_flash currently. What are you trying to achieve?