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Vivado flags a bunch of "unknown" (~80 from dac_refclk to each jesd phy_tx_clk and 16 from dac_refclk to sys_clk) and "unsafe" (1-3 on each clock domain, presumably comb logic in front of the ARS) CDCs on Sayma.
"Clock enable controlled CDC structure detected"
"Combinational logic detected before a synchronizer"
"Multi-bit synchronized with ASYNC_REG property"
Vivado flags a bunch of "unknown" (~80 from dac_refclk to each jesd phy_tx_clk and 16 from dac_refclk to sys_clk) and "unsafe" (1-3 on each clock domain, presumably comb logic in front of the ARS) CDCs on Sayma.
"Clock enable controlled CDC structure detected"
"Combinational logic detected before a synchronizer"
"Multi-bit synchronized with ASYNC_REG property"
Maybe related:
#58
#103
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