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linux-3.2.1-3.2.6.patch
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linux-3.2.1-3.2.6.patch
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diff -Naur linux-3.2.0/arch/arm/kernel/ptrace.c linux-3.2.6/arch/arm/kernel/ptrace.c
--- linux-3.2.0/arch/arm/kernel/ptrace.c 2012-03-22 11:54:57.291649819 +0100
+++ linux-3.2.6/arch/arm/kernel/ptrace.c 2012-03-21 15:00:15.035150024 +0100
@@ -699,10 +699,13 @@
{
int ret;
struct thread_info *thread = task_thread_info(target);
- struct vfp_hard_struct new_vfp = thread->vfpstate.hard;
+ struct vfp_hard_struct new_vfp;
const size_t user_fpregs_offset = offsetof(struct user_vfp, fpregs);
const size_t user_fpscr_offset = offsetof(struct user_vfp, fpscr);
+ vfp_sync_hwstate(thread);
+ new_vfp = thread->vfpstate.hard;
+
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&new_vfp.fpregs,
user_fpregs_offset,
@@ -723,9 +726,8 @@
if (ret)
return ret;
- vfp_sync_hwstate(thread);
- thread->vfpstate.hard = new_vfp;
vfp_flush_hwstate(thread);
+ thread->vfpstate.hard = new_vfp;
return 0;
}
diff -Naur linux-3.2.0/arch/arm/kernel/signal.c linux-3.2.6/arch/arm/kernel/signal.c
--- linux-3.2.0/arch/arm/kernel/signal.c 2012-03-22 11:54:57.303649787 +0100
+++ linux-3.2.6/arch/arm/kernel/signal.c 2012-03-21 15:00:15.035150024 +0100
@@ -227,6 +227,8 @@
if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
return -EINVAL;
+ vfp_flush_hwstate(thread);
+
/*
* Copy the floating point registers. There can be unused
* registers see asm/hwcap.h for details.
@@ -251,9 +253,6 @@
__get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
__get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
- if (!err)
- vfp_flush_hwstate(thread);
-
return err ? -EFAULT : 0;
}
diff -Naur linux-3.2.0/arch/arm/mach-at91/setup.c linux-3.2.6/arch/arm/mach-at91/setup.c
--- linux-3.2.0/arch/arm/mach-at91/setup.c 2012-03-22 11:54:57.303649787 +0100
+++ linux-3.2.6/arch/arm/mach-at91/setup.c 2012-03-21 15:00:15.063150464 +0100
@@ -27,9 +27,12 @@
void __init at91rm9200_set_type(int type)
{
if (type == ARCH_REVISON_9200_PQFP)
- at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
- else
at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
+ else
+ at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
+
+ pr_info("AT91: filled in soc subtype: %s\n",
+ at91_get_soc_subtype(&at91_soc_initdata));
}
void __init at91_init_irq_default(void)
diff -Naur linux-3.2.0/arch/arm/mach-omap2/gpmc.c linux-3.2.6/arch/arm/mach-omap2/gpmc.c
--- linux-3.2.0/arch/arm/mach-omap2/gpmc.c 2012-03-22 11:54:57.311149585 +0100
+++ linux-3.2.6/arch/arm/mach-omap2/gpmc.c 2012-03-21 15:00:15.231149933 +0100
@@ -528,7 +528,13 @@
case GPMC_CONFIG_DEV_SIZE:
regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
+
+ /* clear 2 target bits */
+ regval &= ~GPMC_CONFIG1_DEVICESIZE(3);
+
+ /* set the proper value */
regval |= GPMC_CONFIG1_DEVICESIZE(wval);
+
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
break;
diff -Naur linux-3.2.0/arch/arm/mach-ux500/board-mop500-sdi.c linux-3.2.6/arch/arm/mach-ux500/board-mop500-sdi.c
--- linux-3.2.0/arch/arm/mach-ux500/board-mop500-sdi.c 2012-03-22 11:54:57.323650444 +0100
+++ linux-3.2.6/arch/arm/mach-ux500/board-mop500-sdi.c 2012-03-21 15:00:15.379150657 +0100
@@ -233,6 +233,8 @@
{
u32 periphid = 0x10480180;
+ /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported on sdi0 */
+ mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
/* On-board eMMC */
diff -Naur linux-3.2.0/arch/arm/mach-ux500/Kconfig linux-3.2.6/arch/arm/mach-ux500/Kconfig
--- linux-3.2.0/arch/arm/mach-ux500/Kconfig 2012-03-22 11:54:57.319649611 +0100
+++ linux-3.2.6/arch/arm/mach-ux500/Kconfig 2012-03-21 15:00:15.379150657 +0100
@@ -7,6 +7,7 @@
select HAS_MTU
select ARM_ERRATA_753970
select ARM_ERRATA_754322
+ select ARM_ERRATA_764369
menu "Ux500 SoC"
diff -Naur linux-3.2.0/arch/arm/mm/proc-v7.S linux-3.2.6/arch/arm/mm/proc-v7.S
--- linux-3.2.0/arch/arm/mm/proc-v7.S 2012-03-22 11:54:57.327650214 +0100
+++ linux-3.2.6/arch/arm/mm/proc-v7.S 2012-03-21 15:00:15.411150799 +0100
@@ -271,10 +271,6 @@
* Initialise TLB, Caches, and MMU state ready to switch the MMU
* on. Return in r0 the new CP15 C1 control register setting.
*
- * We automatically detect if we have a Harvard cache, and use the
- * Harvard cache control instructions insead of the unified cache
- * control instructions.
- *
* This should be able to cover all ARMv7 cores.
*
* It is assumed that:
@@ -373,9 +369,7 @@
#endif
3: mov r10, #0
-#ifdef HARVARD_CACHE
mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
-#endif
dsb
#ifdef CONFIG_MMU
mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs
diff -Naur linux-3.2.0/arch/ia64/kernel/acpi.c linux-3.2.6/arch/ia64/kernel/acpi.c
--- linux-3.2.0/arch/ia64/kernel/acpi.c 2012-03-22 11:54:57.339649616 +0100
+++ linux-3.2.6/arch/ia64/kernel/acpi.c 2012-03-21 15:00:15.771151084 +0100
@@ -429,22 +429,24 @@
static struct acpi_table_slit __initdata *slit_table;
cpumask_t early_cpu_possible_map = CPU_MASK_NONE;
-static int get_processor_proximity_domain(struct acpi_srat_cpu_affinity *pa)
+static int __init
+get_processor_proximity_domain(struct acpi_srat_cpu_affinity *pa)
{
int pxm;
pxm = pa->proximity_domain_lo;
- if (ia64_platform_is("sn2"))
+ if (ia64_platform_is("sn2") || acpi_srat_revision >= 2)
pxm += pa->proximity_domain_hi[0] << 8;
return pxm;
}
-static int get_memory_proximity_domain(struct acpi_srat_mem_affinity *ma)
+static int __init
+get_memory_proximity_domain(struct acpi_srat_mem_affinity *ma)
{
int pxm;
pxm = ma->proximity_domain;
- if (!ia64_platform_is("sn2"))
+ if (!ia64_platform_is("sn2") && acpi_srat_revision <= 1)
pxm &= 0xff;
return pxm;
diff -Naur linux-3.2.0/arch/m68k/atari/config.c linux-3.2.6/arch/m68k/atari/config.c
--- linux-3.2.0/arch/m68k/atari/config.c 2012-03-22 11:54:57.347649627 +0100
+++ linux-3.2.6/arch/m68k/atari/config.c 2012-03-21 15:00:15.839150442 +0100
@@ -414,9 +414,9 @@
* FDC val = 4 -> Supervisor only */
asm volatile ("\n"
" .chip 68030\n"
- " pmove %0@,%/tt1\n"
+ " pmove %0,%/tt1\n"
" .chip 68k"
- : : "a" (&tt1_val));
+ : : "m" (tt1_val));
} else {
asm volatile ("\n"
" .chip 68040\n"
@@ -569,10 +569,10 @@
: "d0");
} else
asm volatile ("\n"
- " pmove %0@,%%tc\n"
+ " pmove %0,%%tc\n"
" jmp %1@"
: /* no outputs */
- : "a" (&tc_val), "a" (reset_addr));
+ : "m" (tc_val), "a" (reset_addr));
}
diff -Naur linux-3.2.0/arch/m68k/kernel/process_mm.c linux-3.2.6/arch/m68k/kernel/process_mm.c
--- linux-3.2.0/arch/m68k/kernel/process_mm.c 2012-03-22 11:54:57.347649627 +0100
+++ linux-3.2.6/arch/m68k/kernel/process_mm.c 2012-03-21 15:00:15.907151201 +0100
@@ -189,8 +189,8 @@
current->thread.fs = __USER_DS;
if (!FPU_IS_EMU)
asm volatile (".chip 68k/68881\n\t"
- "frestore %0@\n\t"
- ".chip 68k" : : "a" (&zero));
+ "frestore %0\n\t"
+ ".chip 68k" : : "m" (zero));
}
/*
diff -Naur linux-3.2.0/arch/m68k/kernel/process_no.c linux-3.2.6/arch/m68k/kernel/process_no.c
--- linux-3.2.0/arch/m68k/kernel/process_no.c 2012-03-22 11:54:57.347649627 +0100
+++ linux-3.2.6/arch/m68k/kernel/process_no.c 2012-03-21 15:00:15.907151201 +0100
@@ -163,8 +163,8 @@
#ifdef CONFIG_FPU
if (!FPU_IS_EMU)
asm volatile (".chip 68k/68881\n\t"
- "frestore %0@\n\t"
- ".chip 68k" : : "a" (&zero));
+ "frestore %0\n\t"
+ ".chip 68k" : : "m" (zero));
#endif
}
diff -Naur linux-3.2.0/arch/m68k/kernel/traps.c linux-3.2.6/arch/m68k/kernel/traps.c
--- linux-3.2.0/arch/m68k/kernel/traps.c 2012-03-22 11:54:57.355649638 +0100
+++ linux-3.2.6/arch/m68k/kernel/traps.c 2012-03-21 15:00:15.911150197 +0100
@@ -552,13 +552,13 @@
#ifdef DEBUG
asm volatile ("ptestr %3,%2@,#7,%0\n\t"
- "pmove %%psr,%1@"
- : "=a&" (desc)
- : "a" (&temp), "a" (addr), "d" (ssw));
+ "pmove %%psr,%1"
+ : "=a&" (desc), "=m" (temp)
+ : "a" (addr), "d" (ssw));
#else
asm volatile ("ptestr %2,%1@,#7\n\t"
- "pmove %%psr,%0@"
- : : "a" (&temp), "a" (addr), "d" (ssw));
+ "pmove %%psr,%0"
+ : "=m" (temp) : "a" (addr), "d" (ssw));
#endif
mmusr = temp;
@@ -605,20 +605,18 @@
!(ssw & RW) ? "write" : "read", addr,
fp->ptregs.pc, ssw);
asm volatile ("ptestr #1,%1@,#0\n\t"
- "pmove %%psr,%0@"
- : /* no outputs */
- : "a" (&temp), "a" (addr));
+ "pmove %%psr,%0"
+ : "=m" (temp)
+ : "a" (addr));
mmusr = temp;
printk ("level 0 mmusr is %#x\n", mmusr);
#if 0
- asm volatile ("pmove %%tt0,%0@"
- : /* no outputs */
- : "a" (&tlong));
+ asm volatile ("pmove %%tt0,%0"
+ : "=m" (tlong));
printk("tt0 is %#lx, ", tlong);
- asm volatile ("pmove %%tt1,%0@"
- : /* no outputs */
- : "a" (&tlong));
+ asm volatile ("pmove %%tt1,%0"
+ : "=m" (tlong));
printk("tt1 is %#lx\n", tlong);
#endif
#ifdef DEBUG
@@ -668,13 +666,13 @@
#ifdef DEBUG
asm volatile ("ptestr #1,%2@,#7,%0\n\t"
- "pmove %%psr,%1@"
- : "=a&" (desc)
- : "a" (&temp), "a" (addr));
+ "pmove %%psr,%1"
+ : "=a&" (desc), "=m" (temp)
+ : "a" (addr));
#else
asm volatile ("ptestr #1,%1@,#7\n\t"
- "pmove %%psr,%0@"
- : : "a" (&temp), "a" (addr));
+ "pmove %%psr,%0"
+ : "=m" (temp) : "a" (addr));
#endif
mmusr = temp;
diff -Naur linux-3.2.0/arch/m68k/mm/cache.c linux-3.2.6/arch/m68k/mm/cache.c
--- linux-3.2.0/arch/m68k/mm/cache.c 2012-03-22 11:54:57.355649638 +0100
+++ linux-3.2.6/arch/m68k/mm/cache.c 2012-03-21 15:00:15.915151458 +0100
@@ -52,9 +52,9 @@
unsigned long *descaddr;
asm volatile ("ptestr %3,%2@,#7,%0\n\t"
- "pmove %%psr,%1@"
- : "=a&" (descaddr)
- : "a" (&mmusr), "a" (vaddr), "d" (get_fs().seg));
+ "pmove %%psr,%1"
+ : "=a&" (descaddr), "=m" (mmusr)
+ : "a" (vaddr), "d" (get_fs().seg));
if (mmusr & (MMU_I|MMU_B|MMU_L))
return 0;
descaddr = phys_to_virt((unsigned long)descaddr);
diff -Naur linux-3.2.0/arch/powerpc/include/asm/time.h linux-3.2.6/arch/powerpc/include/asm/time.h
--- linux-3.2.0/arch/powerpc/include/asm/time.h 2012-03-22 11:54:57.363649892 +0100
+++ linux-3.2.6/arch/powerpc/include/asm/time.h 2012-03-21 15:00:16.331150581 +0100
@@ -219,5 +219,7 @@
extern void secondary_cpu_time_init(void);
extern void iSeries_time_init_early(void);
+extern void decrementer_check_overflow(void);
+
#endif /* __KERNEL__ */
#endif /* __POWERPC_TIME_H */
diff -Naur linux-3.2.0/arch/powerpc/kernel/irq.c linux-3.2.6/arch/powerpc/kernel/irq.c
--- linux-3.2.0/arch/powerpc/kernel/irq.c 2012-03-22 11:54:57.367650682 +0100
+++ linux-3.2.6/arch/powerpc/kernel/irq.c 2012-03-21 15:00:16.347151310 +0100
@@ -164,16 +164,13 @@
*/
local_paca->hard_enabled = en;
-#ifndef CONFIG_BOOKE
- /* On server, re-trigger the decrementer if it went negative since
- * some processors only trigger on edge transitions of the sign bit.
- *
- * BookE has a level sensitive decrementer (latches in TSR) so we
- * don't need that
+ /*
+ * Trigger the decrementer if we have a pending event. Some processors
+ * only trigger on edge transitions of the sign bit. We might also
+ * have disabled interrupts long enough that the decrementer wrapped
+ * to positive.
*/
- if ((int)mfspr(SPRN_DEC) < 0)
- mtspr(SPRN_DEC, 1);
-#endif /* CONFIG_BOOKE */
+ decrementer_check_overflow();
/*
* Force the delivery of pending soft-disabled interrupts on PS3.
diff -Naur linux-3.2.0/arch/powerpc/kernel/time.c linux-3.2.6/arch/powerpc/kernel/time.c
--- linux-3.2.0/arch/powerpc/kernel/time.c 2012-03-22 11:54:57.371650812 +0100
+++ linux-3.2.6/arch/powerpc/kernel/time.c 2012-03-21 15:00:16.367150939 +0100
@@ -889,6 +889,15 @@
clock->name, clock->mult, clock->shift);
}
+void decrementer_check_overflow(void)
+{
+ u64 now = get_tb_or_rtc();
+ struct decrementer_clock *decrementer = &__get_cpu_var(decrementers);
+
+ if (now >= decrementer->next_tb)
+ set_dec(1);
+}
+
static int decrementer_set_next_event(unsigned long evt,
struct clock_event_device *dev)
{
diff -Naur linux-3.2.0/arch/powerpc/platforms/pseries/hvCall_inst.c linux-3.2.6/arch/powerpc/platforms/pseries/hvCall_inst.c
--- linux-3.2.0/arch/powerpc/platforms/pseries/hvCall_inst.c 2012-03-22 11:54:57.379649620 +0100
+++ linux-3.2.6/arch/powerpc/platforms/pseries/hvCall_inst.c 2012-03-21 15:00:16.455150871 +0100
@@ -109,7 +109,7 @@
if (opcode > MAX_HCALL_OPCODE)
return;
- h = &get_cpu_var(hcall_stats)[opcode / 4];
+ h = &__get_cpu_var(hcall_stats)[opcode / 4];
h->tb_start = mftb();
h->purr_start = mfspr(SPRN_PURR);
}
@@ -126,8 +126,6 @@
h->num_calls++;
h->tb_total += mftb() - h->tb_start;
h->purr_total += mfspr(SPRN_PURR) - h->purr_start;
-
- put_cpu_var(hcall_stats);
}
static int __init hcall_inst_init(void)
diff -Naur linux-3.2.0/arch/powerpc/platforms/pseries/lpar.c linux-3.2.6/arch/powerpc/platforms/pseries/lpar.c
--- linux-3.2.0/arch/powerpc/platforms/pseries/lpar.c 2012-03-22 11:54:57.387649431 +0100
+++ linux-3.2.6/arch/powerpc/platforms/pseries/lpar.c 2012-03-21 15:00:16.455150871 +0100
@@ -554,6 +554,7 @@
goto out;
(*depth)++;
+ preempt_disable();
trace_hcall_entry(opcode, args);
(*depth)--;
@@ -576,6 +577,7 @@
(*depth)++;
trace_hcall_exit(opcode, retval, retbuf);
+ preempt_enable();
(*depth)--;
out:
diff -Naur linux-3.2.0/arch/score/kernel/entry.S linux-3.2.6/arch/score/kernel/entry.S
--- linux-3.2.0/arch/score/kernel/entry.S 2012-03-22 11:54:57.387649431 +0100
+++ linux-3.2.6/arch/score/kernel/entry.S 2012-03-21 15:00:16.531150792 +0100
@@ -408,7 +408,7 @@
sw r9, [r0, PT_EPC]
cmpi.c r27, __NR_syscalls # check syscall number
- bgtu illegal_syscall
+ bgeu illegal_syscall
slli r8, r27, 2 # get syscall routine
la r11, sys_call_table
diff -Naur linux-3.2.0/arch/x86/include/asm/amd_nb.h linux-3.2.6/arch/x86/include/asm/amd_nb.h
--- linux-3.2.0/arch/x86/include/asm/amd_nb.h 2012-03-22 11:54:57.395649747 +0100
+++ linux-3.2.6/arch/x86/include/asm/amd_nb.h 2012-03-21 15:00:16.847150752 +0100
@@ -1,6 +1,7 @@
#ifndef _ASM_X86_AMD_NB_H
#define _ASM_X86_AMD_NB_H
+#include <linux/ioport.h>
#include <linux/pci.h>
struct amd_nb_bus_dev_range {
@@ -13,6 +14,7 @@
extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
extern bool early_is_amd_nb(u32 value);
+extern struct resource *amd_get_mmconfig_range(struct resource *res);
extern int amd_cache_northbridges(void);
extern void amd_flush_garts(void);
extern int amd_numa_init(void);
diff -Naur linux-3.2.0/arch/x86/include/asm/uv/uv_bau.h linux-3.2.6/arch/x86/include/asm/uv/uv_bau.h
--- linux-3.2.0/arch/x86/include/asm/uv/uv_bau.h 2012-03-22 11:54:57.403649894 +0100
+++ linux-3.2.6/arch/x86/include/asm/uv/uv_bau.h 2012-03-21 15:00:16.879151278 +0100
@@ -65,7 +65,7 @@
* UV2: Bit 19 selects between
* (0): 10 microsecond timebase and
* (1): 80 microseconds
- * we're using 655us, similar to UV1: 65 units of 10us
+ * we're using 560us, similar to UV1: 65 units of 10us
*/
#define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)
@@ -167,6 +167,7 @@
#define FLUSH_RETRY_TIMEOUT 2
#define FLUSH_GIVEUP 3
#define FLUSH_COMPLETE 4
+#define FLUSH_RETRY_BUSYBUG 5
/*
* tuning the action when the numalink network is extremely delayed
@@ -235,10 +236,10 @@
/*
- * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
+ * UV1 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
* see table 4.2.3.0.1 in broacast_assist spec.
*/
-struct bau_msg_header {
+struct uv1_bau_msg_header {
unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
/* bits 5:0 */
unsigned int base_dest_nasid:15; /* nasid of the first bit */
@@ -318,19 +319,87 @@
};
/*
+ * UV2 Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
+ * see figure 9-2 of harp_sys.pdf
+ */
+struct uv2_bau_msg_header {
+ unsigned int base_dest_nasid:15; /* nasid of the first bit */
+ /* bits 14:0 */ /* in uvhub map */
+ unsigned int dest_subnodeid:5; /* must be 0x10, for the LB */
+ /* bits 19:15 */
+ unsigned int rsvd_1:1; /* must be zero */
+ /* bit 20 */
+ /* Address bits 59:21 */
+ /* bits 25:2 of address (44:21) are payload */
+ /* these next 24 bits become bytes 12-14 of msg */
+ /* bits 28:21 land in byte 12 */
+ unsigned int replied_to:1; /* sent as 0 by the source to
+ byte 12 */
+ /* bit 21 */
+ unsigned int msg_type:3; /* software type of the
+ message */
+ /* bits 24:22 */
+ unsigned int canceled:1; /* message canceled, resource
+ is to be freed*/
+ /* bit 25 */
+ unsigned int payload_1:3; /* not currently used */
+ /* bits 28:26 */
+
+ /* bits 36:29 land in byte 13 */
+ unsigned int payload_2a:3; /* not currently used */
+ unsigned int payload_2b:5; /* not currently used */
+ /* bits 36:29 */
+
+ /* bits 44:37 land in byte 14 */
+ unsigned int payload_3:8; /* not currently used */
+ /* bits 44:37 */
+
+ unsigned int rsvd_2:7; /* reserved */
+ /* bits 51:45 */
+ unsigned int swack_flag:1; /* software acknowledge flag */
+ /* bit 52 */
+ unsigned int rsvd_3a:3; /* must be zero */
+ unsigned int rsvd_3b:8; /* must be zero */
+ unsigned int rsvd_3c:8; /* must be zero */
+ unsigned int rsvd_3d:3; /* must be zero */
+ /* bits 74:53 */
+ unsigned int fairness:3; /* usually zero */
+ /* bits 77:75 */
+
+ unsigned int sequence:16; /* message sequence number */
+ /* bits 93:78 Suppl_A */
+ unsigned int chaining:1; /* next descriptor is part of
+ this activation*/
+ /* bit 94 */
+ unsigned int multilevel:1; /* multi-level multicast
+ format */
+ /* bit 95 */
+ unsigned int rsvd_4:24; /* ordered / source node /
+ source subnode / aging
+ must be zero */
+ /* bits 119:96 */
+ unsigned int command:8; /* message type */
+ /* bits 127:120 */
+};
+
+/*
* The activation descriptor:
* The format of the message to send, plus all accompanying control
* Should be 64 bytes
*/
struct bau_desc {
- struct pnmask distribution;
+ struct pnmask distribution;
/*
* message template, consisting of header and payload:
*/
- struct bau_msg_header header;
- struct bau_msg_payload payload;
+ union bau_msg_header {
+ struct uv1_bau_msg_header uv1_hdr;
+ struct uv2_bau_msg_header uv2_hdr;
+ } header;
+
+ struct bau_msg_payload payload;
};
-/*
+/* UV1:
* -payload-- ---------header------
* bytes 0-11 bits 41-56 bits 58-81
* A B (2) C (3)
@@ -340,6 +409,16 @@
* bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
* ------------payload queue-----------
*/
+/* UV2:
+ * -payload-- ---------header------
+ * bytes 0-11 bits 70-78 bits 21-44
+ * A B (2) C (3)
+ *
+ * A/B/C are moved to:
+ * A C B
+ * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector)
+ * ------------payload queue-----------
+ */
/*
* The payload queue on the destination side is an array of these.
@@ -385,7 +464,6 @@
struct msg_desc {
struct bau_pq_entry *msg;
int msg_slot;
- int swack_slot;
struct bau_pq_entry *queue_first;
struct bau_pq_entry *queue_last;
};
@@ -439,6 +517,9 @@
unsigned long s_retry_messages; /* retry broadcasts */
unsigned long s_bau_reenabled; /* for bau enable/disable */
unsigned long s_bau_disabled; /* for bau enable/disable */
+ unsigned long s_uv2_wars; /* uv2 workaround, perm. busy */
+ unsigned long s_uv2_wars_hw; /* uv2 workaround, hiwater */
+ unsigned long s_uv2_war_waits; /* uv2 workaround, long waits */
/* destination statistics */
unsigned long d_alltlb; /* times all tlb's on this
cpu were flushed */
@@ -511,9 +592,12 @@
short osnode;
short uvhub_cpu;
short uvhub;
+ short uvhub_version;
short cpus_in_socket;
short cpus_in_uvhub;
short partition_base_pnode;
+ short using_desc; /* an index, like uvhub_cpu */
+ unsigned int inuse_map;
unsigned short message_number;
unsigned short uvhub_quiesce;
short socket_acknowledge_count[DEST_Q_SIZE];
@@ -531,6 +615,7 @@
int cong_response_us;
int cong_reps;
int cong_period;
+ unsigned long clocks_per_100_usec;
cycles_t period_time;
long period_requests;
struct hub_and_pnode *thp;
@@ -591,6 +676,11 @@
uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
}
+static inline void write_gmmr_sw_ack(int pnode, unsigned long mr)
+{
+ write_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
+}
+
static inline unsigned long read_mmr_sw_ack(void)
{
return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
diff -Naur linux-3.2.0/arch/x86/include/asm/uv/uv_hub.h linux-3.2.6/arch/x86/include/asm/uv/uv_hub.h
--- linux-3.2.0/arch/x86/include/asm/uv/uv_hub.h 2012-03-22 11:54:57.403649894 +0100
+++ linux-3.2.6/arch/x86/include/asm/uv/uv_hub.h 2012-03-21 15:00:16.879151278 +0100
@@ -318,13 +318,13 @@
/* UV global physical address --> socket phys RAM */
static inline unsigned long uv_gpa_to_soc_phys_ram(unsigned long gpa)
{
- unsigned long paddr = gpa & uv_hub_info->gpa_mask;
+ unsigned long paddr;
unsigned long remap_base = uv_hub_info->lowmem_remap_base;
unsigned long remap_top = uv_hub_info->lowmem_remap_top;
gpa = ((gpa << uv_hub_info->m_shift) >> uv_hub_info->m_shift) |
((gpa >> uv_hub_info->n_lshift) << uv_hub_info->m_val);
- gpa = gpa & uv_hub_info->gpa_mask;
+ paddr = gpa & uv_hub_info->gpa_mask;
if (paddr >= remap_base && paddr < remap_base + remap_top)
paddr -= remap_base;
return paddr;
diff -Naur linux-3.2.0/arch/x86/kernel/amd_nb.c linux-3.2.6/arch/x86/kernel/amd_nb.c
--- linux-3.2.0/arch/x86/kernel/amd_nb.c 2012-03-22 11:54:57.407650676 +0100
+++ linux-3.2.6/arch/x86/kernel/amd_nb.c 2012-03-21 15:00:16.887151419 +0100
@@ -119,6 +119,37 @@
return false;
}
+struct resource *amd_get_mmconfig_range(struct resource *res)
+{
+ u32 address;
+ u64 base, msr;
+ unsigned segn_busn_bits;
+
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+ return NULL;
+
+ /* assume all cpus from fam10h have mmconfig */
+ if (boot_cpu_data.x86 < 0x10)
+ return NULL;
+
+ address = MSR_FAM10H_MMIO_CONF_BASE;
+ rdmsrl(address, msr);
+
+ /* mmconfig is not enabled */
+ if (!(msr & FAM10H_MMIO_CONF_ENABLE))
+ return NULL;
+
+ base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
+
+ segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
+ FAM10H_MMIO_CONF_BUSRANGE_MASK;
+
+ res->flags = IORESOURCE_MEM;
+ res->start = base;
+ res->end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
+ return res;
+}
+
int amd_get_subcaches(int cpu)
{
struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
diff -Naur linux-3.2.0/arch/x86/kernel/apic/x2apic_uv_x.c linux-3.2.6/arch/x86/kernel/apic/x2apic_uv_x.c
--- linux-3.2.0/arch/x86/kernel/apic/x2apic_uv_x.c 2012-03-22 11:54:57.407650676 +0100
+++ linux-3.2.6/arch/x86/kernel/apic/x2apic_uv_x.c 2012-03-21 15:00:16.891150691 +0100
@@ -769,7 +769,12 @@
for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++)
uv_possible_blades +=
hweight64(uv_read_local_mmr( UVH_NODE_PRESENT_TABLE + i * 8));
- printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades());
+
+ /* uv_num_possible_blades() is really the hub count */
+ printk(KERN_INFO "UV: Found %d blades, %d hubs\n",
+ is_uv1_hub() ? uv_num_possible_blades() :
+ (uv_num_possible_blades() + 1) / 2,
+ uv_num_possible_blades());
bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
uv_blade_info = kzalloc(bytes, GFP_KERNEL);
diff -Naur linux-3.2.0/arch/x86/kernel/microcode_amd.c linux-3.2.6/arch/x86/kernel/microcode_amd.c
--- linux-3.2.0/arch/x86/kernel/microcode_amd.c 2012-03-22 11:54:57.415649634 +0100
+++ linux-3.2.6/arch/x86/kernel/microcode_amd.c 2012-03-21 15:00:16.911150843 +0100
@@ -300,13 +300,33 @@
return state;
}
+/*
+ * AMD microcode firmware naming convention, up to family 15h they are in
+ * the legacy file:
+ *
+ * amd-ucode/microcode_amd.bin
+ *
+ * This legacy file is always smaller than 2K in size.
+ *
+ * Starting at family 15h they are in family specific firmware files:
+ *
+ * amd-ucode/microcode_amd_fam15h.bin
+ * amd-ucode/microcode_amd_fam16h.bin
+ * ...
+ *
+ * These might be larger than 2K.
+ */
static enum ucode_state request_microcode_amd(int cpu, struct device *device)
{
- const char *fw_name = "amd-ucode/microcode_amd.bin";
+ char fw_name[36] = "amd-ucode/microcode_amd.bin";
const struct firmware *fw;
enum ucode_state ret = UCODE_NFOUND;
+ struct cpuinfo_x86 *c = &cpu_data(cpu);
- if (request_firmware(&fw, fw_name, device)) {
+ if (c->x86 >= 0x15)
+ snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
+
+ if (request_firmware(&fw, (const char *)fw_name, device)) {
pr_err("failed to load file %s\n", fw_name);
goto out;
}
diff -Naur linux-3.2.0/arch/x86/mm/mmap.c linux-3.2.6/arch/x86/mm/mmap.c
--- linux-3.2.0/arch/x86/mm/mmap.c 2012-03-22 11:54:57.423649876 +0100
+++ linux-3.2.6/arch/x86/mm/mmap.c 2012-03-21 15:00:16.951150718 +0100
@@ -75,9 +75,9 @@
*/
if (current->flags & PF_RANDOMIZE) {
if (mmap_is_ia32())
- rnd = (long)get_random_int() % (1<<8);
+ rnd = get_random_int() % (1<<8);
else
- rnd = (long)(get_random_int() % (1<<28));
+ rnd = get_random_int() % (1<<28);
}
return rnd << PAGE_SHIFT;
}
diff -Naur linux-3.2.0/arch/x86/mm/srat.c linux-3.2.6/arch/x86/mm/srat.c
--- linux-3.2.0/arch/x86/mm/srat.c 2012-03-22 11:54:57.423649876 +0100
+++ linux-3.2.6/arch/x86/mm/srat.c 2012-03-21 15:00:16.955150330 +0100
@@ -104,6 +104,8 @@
if ((pa->flags & ACPI_SRAT_CPU_ENABLED) == 0)
return;
pxm = pa->proximity_domain_lo;
+ if (acpi_srat_revision >= 2)
+ pxm |= *((unsigned int*)pa->proximity_domain_hi) << 8;
node = setup_node(pxm);
if (node < 0) {
printk(KERN_ERR "SRAT: Too many proximity domains %x\n", pxm);
@@ -155,6 +157,8 @@
start = ma->base_address;
end = start + ma->length;
pxm = ma->proximity_domain;
+ if (acpi_srat_revision <= 1)
+ pxm &= 0xff;
node = setup_node(pxm);
if (node < 0) {
printk(KERN_ERR "SRAT: Too many proximity domains.\n");
diff -Naur linux-3.2.0/arch/x86/net/bpf_jit_comp.c linux-3.2.6/arch/x86/net/bpf_jit_comp.c
--- linux-3.2.0/arch/x86/net/bpf_jit_comp.c 2012-03-22 11:54:57.427650202 +0100
+++ linux-3.2.6/arch/x86/net/bpf_jit_comp.c 2012-03-21 15:00:16.959150534 +0100
@@ -151,17 +151,18 @@
cleanup_addr = proglen; /* epilogue address */
for (pass = 0; pass < 10; pass++) {
+ u8 seen_or_pass0 = (pass == 0) ? (SEEN_XREG | SEEN_DATAREF | SEEN_MEM) : seen;
/* no prologue/epilogue for trivial filters (RET something) */
proglen = 0;
prog = temp;
- if (seen) {
+ if (seen_or_pass0) {
EMIT4(0x55, 0x48, 0x89, 0xe5); /* push %rbp; mov %rsp,%rbp */
EMIT4(0x48, 0x83, 0xec, 96); /* subq $96,%rsp */
/* note : must save %rbx in case bpf_error is hit */
- if (seen & (SEEN_XREG | SEEN_DATAREF))
+ if (seen_or_pass0 & (SEEN_XREG | SEEN_DATAREF))
EMIT4(0x48, 0x89, 0x5d, 0xf8); /* mov %rbx, -8(%rbp) */
- if (seen & SEEN_XREG)
+ if (seen_or_pass0 & SEEN_XREG)
CLEAR_X(); /* make sure we dont leek kernel memory */
/*
@@ -170,7 +171,7 @@
* r9 = skb->len - skb->data_len
* r8 = skb->data
*/
- if (seen & SEEN_DATAREF) {
+ if (seen_or_pass0 & SEEN_DATAREF) {
if (offsetof(struct sk_buff, len) <= 127)
/* mov off8(%rdi),%r9d */
EMIT4(0x44, 0x8b, 0x4f, offsetof(struct sk_buff, len));
@@ -260,9 +261,14 @@
case BPF_S_ALU_DIV_X: /* A /= X; */
seen |= SEEN_XREG;
EMIT2(0x85, 0xdb); /* test %ebx,%ebx */
- if (pc_ret0 != -1)
- EMIT_COND_JMP(X86_JE, addrs[pc_ret0] - (addrs[i] - 4));
- else {
+ if (pc_ret0 > 0) {
+ /* addrs[pc_ret0 - 1] is start address of target
+ * (addrs[i] - 4) is the address following this jmp
+ * ("xor %edx,%edx; div %ebx" being 4 bytes long)
+ */
+ EMIT_COND_JMP(X86_JE, addrs[pc_ret0 - 1] -
+ (addrs[i] - 4));
+ } else {
EMIT_COND_JMP(X86_JNE, 2 + 5);
CLEAR_A();
EMIT1_off32(0xe9, cleanup_addr - (addrs[i] - 4)); /* jmp .+off32 */
@@ -335,12 +341,12 @@
}
/* fallinto */
case BPF_S_RET_A:
- if (seen) {
+ if (seen_or_pass0) {
if (i != flen - 1) {
EMIT_JMP(cleanup_addr - addrs[i]);
break;
}
- if (seen & SEEN_XREG)
+ if (seen_or_pass0 & SEEN_XREG)
EMIT4(0x48, 0x8b, 0x5d, 0xf8); /* mov -8(%rbp),%rbx */
EMIT1(0xc9); /* leaveq */
}
@@ -483,8 +489,9 @@
goto common_load;
case BPF_S_LDX_B_MSH:
if ((int)K < 0) {
- if (pc_ret0 != -1) {
- EMIT_JMP(addrs[pc_ret0] - addrs[i]);
+ if (pc_ret0 > 0) {
+ /* addrs[pc_ret0 - 1] is the start address */
+ EMIT_JMP(addrs[pc_ret0 - 1] - addrs[i]);
break;
}
CLEAR_A();
@@ -599,13 +606,14 @@
* use it to give the cleanup instruction(s) addr
*/
cleanup_addr = proglen - 1; /* ret */
- if (seen)
+ if (seen_or_pass0)
cleanup_addr -= 1; /* leaveq */
- if (seen & SEEN_XREG)
+ if (seen_or_pass0 & SEEN_XREG)
cleanup_addr -= 4; /* mov -8(%rbp),%rbx */
if (image) {
- WARN_ON(proglen != oldproglen);
+ if (proglen != oldproglen)
+ pr_err("bpb_jit_compile proglen=%u != oldproglen=%u\n", proglen, oldproglen);
break;
}
if (proglen == oldproglen) {
diff -Naur linux-3.2.0/arch/x86/pci/acpi.c linux-3.2.6/arch/x86/pci/acpi.c
--- linux-3.2.0/arch/x86/pci/acpi.c 2012-03-22 11:54:57.427650202 +0100
+++ linux-3.2.6/arch/x86/pci/acpi.c 2012-03-21 15:00:16.959150534 +0100
@@ -149,7 +149,7 @@
struct acpi_resource_address64 addr;
acpi_status status;
unsigned long flags;
- u64 start, end;
+ u64 start, orig_end, end;
status = resource_to_addr(acpi_res, &addr);
if (!ACPI_SUCCESS(status))
@@ -165,7 +165,21 @@
return AE_OK;
start = addr.minimum + addr.translation_offset;
- end = addr.maximum + addr.translation_offset;
+ orig_end = end = addr.maximum + addr.translation_offset;
+
+ /* Exclude non-addressable range or non-addressable portion of range */
+ end = min(end, (u64)iomem_resource.end);
+ if (end <= start) {
+ dev_info(&info->bridge->dev,
+ "host bridge window [%#llx-%#llx] "
+ "(ignored, not CPU addressable)\n", start, orig_end);
+ return AE_OK;
+ } else if (orig_end != end) {
+ dev_info(&info->bridge->dev,
+ "host bridge window [%#llx-%#llx] "
+ "([%#llx-%#llx] ignored, not CPU addressable)\n",
+ start, orig_end, end + 1, orig_end);
+ }
res = &info->res[info->res_num];
res->name = info->name;
diff -Naur linux-3.2.0/arch/x86/pci/amd_bus.c linux-3.2.6/arch/x86/pci/amd_bus.c
--- linux-3.2.0/arch/x86/pci/amd_bus.c 2012-03-22 11:54:57.427650202 +0100
+++ linux-3.2.6/arch/x86/pci/amd_bus.c 2012-03-21 15:00:16.959150534 +0100
@@ -30,34 +30,6 @@
{ 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
};
-static u64 __initdata fam10h_mmconf_start;
-static u64 __initdata fam10h_mmconf_end;
-static void __init get_pci_mmcfg_amd_fam10h_range(void)
-{
- u32 address;
- u64 base, msr;
- unsigned segn_busn_bits;
-
- /* assume all cpus from fam10h have mmconf */
- if (boot_cpu_data.x86 < 0x10)
- return;
-
- address = MSR_FAM10H_MMIO_CONF_BASE;
- rdmsrl(address, msr);
-
- /* mmconfig is not enable */
- if (!(msr & FAM10H_MMIO_CONF_ENABLE))
- return;
-
- base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
-
- segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
- FAM10H_MMIO_CONF_BUSRANGE_MASK;
-
- fam10h_mmconf_start = base;
- fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
-}
-
#define RANGE_NUM 16
/**
@@ -85,6 +57,9 @@
u64 val;
u32 address;
bool found;
+ struct resource fam10h_mmconf_res, *fam10h_mmconf;
+ u64 fam10h_mmconf_start;
+ u64 fam10h_mmconf_end;
if (!early_pci_allowed())
return -1;
@@ -211,12 +186,17 @@
subtract_range(range, RANGE_NUM, 0, end);
/* get mmconfig */
- get_pci_mmcfg_amd_fam10h_range();
+ fam10h_mmconf = amd_get_mmconfig_range(&fam10h_mmconf_res);
/* need to take out mmconf range */
- if (fam10h_mmconf_end) {
- printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end);
+ if (fam10h_mmconf) {
+ printk(KERN_DEBUG "Fam 10h mmconf %pR\n", fam10h_mmconf);
+ fam10h_mmconf_start = fam10h_mmconf->start;
+ fam10h_mmconf_end = fam10h_mmconf->end;
subtract_range(range, RANGE_NUM, fam10h_mmconf_start,
fam10h_mmconf_end + 1);
+ } else {
+ fam10h_mmconf_start = 0;
+ fam10h_mmconf_end = 0;
}
/* mmio resource */
diff -Naur linux-3.2.0/arch/x86/pci/Makefile linux-3.2.6/arch/x86/pci/Makefile
--- linux-3.2.0/arch/x86/pci/Makefile 2012-03-22 11:54:57.427650202 +0100
+++ linux-3.2.6/arch/x86/pci/Makefile 2012-03-21 15:00:16.959150534 +0100
@@ -18,8 +18,9 @@
obj-$(CONFIG_X86_MRST) += mrst.o
obj-y += common.o early.o
-obj-y += amd_bus.o bus_numa.o
+obj-y += bus_numa.o
+obj-$(CONFIG_AMD_NB) += amd_bus.o
obj-$(CONFIG_PCI_CNB20LE_QUIRK) += broadcom_bus.o
ifeq ($(CONFIG_PCI_DEBUG),y)
diff -Naur linux-3.2.0/arch/x86/platform/uv/tlb_uv.c linux-3.2.6/arch/x86/platform/uv/tlb_uv.c
--- linux-3.2.0/arch/x86/platform/uv/tlb_uv.c 2012-03-22 11:54:57.427650202 +0100
+++ linux-3.2.6/arch/x86/platform/uv/tlb_uv.c 2012-03-21 15:00:16.971150972 +0100
@@ -157,13 +157,14 @@
* clear of the Timeout bit (as well) will free the resource. No reply will
* be sent (the hardware will only do one reply per message).
*/