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DAC_Verilog_auto.sh
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#!/bin/bash
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-4-1106-preview --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-4-1106-preview/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-0125 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-0125/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gpt-3.5-turbo-1106 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gpt-3.5-turbo-1106/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/HDLEval-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=gemini-1.5-flash-002 --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/gemini-1.5-flash-002/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/HDLEval-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-70B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-70B-Instruct/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a --top_k=10
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/HDLEval-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:24a_pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-comb/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-comb/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-comb/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-comb/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-comb
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-pipe/Verilog/simple --lec_limit=1 --comp_limit=1 hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-pipe/Verilog/few_shot --lec_limit=1 --comp_limit=1 --init_context hdlagent/resources/Verilog/Verilog_examples.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-pipe/Verilog/init --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md hdeval:VerilogEval2-pipe
timeout 4000 poetry run hdlagent/cli_agent.py bench --llm=Meta-Llama-3.1-405B-Instruct --skip_successful --skip_completed --lang=Verilog --w_dir=../DAC_results/Meta-Llama-3.1-405B-Instruct/VerilogEval2-pipe/Verilog/supp --lec_limit=1 --comp_limit=8 --init_context hdlagent/resources/Verilog/Verilog_context_1.md --supp_context hdeval:VerilogEval2-pipe