Skip to content

Commit cf3d7d6

Browse files
[bot] AutoMerging: merge all upstream's changes:
* https://github.com/coolsnowwolf/lede: mediatek: add CMCC RAX3000M NAND/eMMC Uboot-mod support toolchain: gdb: fix optional python support
2 parents 3612e9b + 8d0d1a4 commit cf3d7d6

File tree

10 files changed

+376
-8
lines changed

10 files changed

+376
-8
lines changed

package/boot/uboot-envtools/files/mediatek_filogic

+6
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,12 @@ bananapi,bpi-r3)
3434
;;
3535
esac
3636
;;
37+
cmcc,rax3000m-emmc-ubootmod)
38+
ubootenv_add_uci_config "/dev/mmcblk0p1" "0x0" "0x80000" "0x80000"
39+
;;
40+
cmcc,rax3000m-nand-ubootmod)
41+
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
42+
;;
3743
glinet,gl-mt2500|\
3844
glinet,gl-mt6000)
3945
local envdev=$(find_mmc_part "u-boot-env")
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,42 @@
1+
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2+
3+
/dts-v1/;
4+
#include "mt7981b-cmcc-rax3000m.dts"
5+
6+
/ {
7+
model = "CMCC RAX3000M eMMC version (custom U-Boot layout)";
8+
compatible = "cmcc,rax3000m-emmc-ubootmod", "mediatek,mt7981";
9+
10+
chosen {
11+
bootargs = "root=PARTLABEL=rootfs rootwait rootfstype=squashfs,f2fs";
12+
};
13+
};
14+
15+
&mmc0 {
16+
bus-width = <8>;
17+
max-frequency = <26000000>;
18+
no-sd;
19+
no-sdio;
20+
non-removable;
21+
pinctrl-names = "default", "state_uhs";
22+
pinctrl-0 = <&mmc0_pins_default>;
23+
pinctrl-1 = <&mmc0_pins_uhs>;
24+
vmmc-supply = <&reg_3p3v>;
25+
status = "okay";
26+
};
27+
28+
&pio {
29+
mmc0_pins_default: mmc0-pins {
30+
mux {
31+
function = "flash";
32+
groups = "emmc_45";
33+
};
34+
};
35+
36+
mmc0_pins_uhs: mmc0-uhs-pins {
37+
mux {
38+
function = "flash";
39+
groups = "emmc_45";
40+
};
41+
};
42+
};
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,119 @@
1+
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2+
3+
/dts-v1/;
4+
#include "mt7981b-cmcc-rax3000m.dts"
5+
6+
/ {
7+
model = "CMCC RAX3000M NAND version (custom U-Boot layout)";
8+
compatible = "cmcc,rax3000m-nand-ubootmod", "mediatek,mt7981";
9+
10+
aliases {
11+
label-mac-device = &gmac1;
12+
};
13+
};
14+
15+
&gmac0 {
16+
nvmem-cells = <&macaddr_factory_2a 0>;
17+
nvmem-cell-names = "mac-address";
18+
};
19+
20+
&gmac1 {
21+
nvmem-cells = <&macaddr_factory_24 0>;
22+
nvmem-cell-names = "mac-address";
23+
};
24+
25+
&spi0 {
26+
pinctrl-names = "default";
27+
pinctrl-0 = <&spi0_flash_pins>;
28+
status = "okay";
29+
30+
spi_nand: flash@0 {
31+
#address-cells = <1>;
32+
#size-cells = <1>;
33+
compatible = "spi-nand";
34+
reg = <0>;
35+
36+
spi-max-frequency = <52000000>;
37+
spi-tx-bus-width = <4>;
38+
spi-rx-bus-width = <4>;
39+
mediatek,nmbm;
40+
mediatek,bmt-max-ratio = <1>;
41+
mediatek,bmt-max-reserved-blocks = <64>;
42+
43+
partitions: partitions {
44+
compatible = "fixed-partitions";
45+
#address-cells = <1>;
46+
#size-cells = <1>;
47+
48+
partition@0 {
49+
label = "BL2";
50+
reg = <0x00000 0x100000>;
51+
read-only;
52+
};
53+
54+
partition@100000 {
55+
label = "u-boot-env";
56+
reg = <0x100000 0x80000>;
57+
};
58+
59+
factory: partition@180000 {
60+
label = "Factory";
61+
reg = <0x180000 0x200000>;
62+
63+
compatible = "nvmem-cells";
64+
nvmem-layout {
65+
compatible = "fixed-layout";
66+
#address-cells = <1>;
67+
#size-cells = <1>;
68+
69+
macaddr_factory_24: macaddr@24 {
70+
compatible = "mac-base";
71+
reg = <0x24 0x6>;
72+
#nvmem-cell-cells = <1>;
73+
};
74+
75+
macaddr_factory_2a: macaddr@2a {
76+
compatible = "mac-base";
77+
reg = <0x2a 0x6>;
78+
#nvmem-cell-cells = <1>;
79+
};
80+
};
81+
};
82+
83+
partition@380000 {
84+
label = "FIP";
85+
reg = <0x380000 0x200000>;
86+
};
87+
88+
partition@580000 {
89+
label = "ubi";
90+
reg = <0x580000 0x7200000>;
91+
};
92+
};
93+
};
94+
};
95+
96+
&pio {
97+
spi0_flash_pins: spi0-pins {
98+
mux {
99+
function = "spi";
100+
groups = "spi0", "spi0_wp_hold";
101+
};
102+
103+
conf-pu {
104+
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
105+
drive-strength = <MTK_DRIVE_8mA>;
106+
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
107+
};
108+
109+
conf-pd {
110+
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
111+
drive-strength = <MTK_DRIVE_8mA>;
112+
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
113+
};
114+
};
115+
};
116+
117+
&wifi {
118+
mediatek,mtd-eeprom = <&factory 0x0>;
119+
};
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,156 @@
1+
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2+
/*
3+
* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
4+
*/
5+
6+
/dts-v1/;
7+
#include <dt-bindings/gpio/gpio.h>
8+
#include <dt-bindings/input/input.h>
9+
10+
#include "mt7981.dtsi"
11+
12+
/ {
13+
model = "CMCC RAX3000M";
14+
compatible = "cmcc,rax3000m", "mediatek,mt7981";
15+
16+
aliases {
17+
led-boot = &red_led;
18+
led-failsafe = &red_led;
19+
led-running = &green_led;
20+
led-upgrade = &green_led;
21+
serial0 = &uart0;
22+
};
23+
24+
chosen {
25+
stdout-path = "serial0:115200n8";
26+
};
27+
28+
memory {
29+
reg = <0 0x40000000 0 0x20000000>;
30+
};
31+
32+
gpio-keys {
33+
compatible = "gpio-keys";
34+
35+
button-reset {
36+
label = "reset";
37+
linux,code = <KEY_RESTART>;
38+
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
39+
};
40+
41+
button-mesh {
42+
label = "mesh";
43+
linux,code = <BTN_9>;
44+
linux,input-type = <EV_SW>;
45+
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
46+
};
47+
};
48+
49+
gpio-leds {
50+
compatible = "gpio-leds";
51+
52+
green_led: led-0 {
53+
label = "green:status";
54+
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
55+
};
56+
57+
led-1 {
58+
label = "blue:status";
59+
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
60+
};
61+
62+
red_led: led-2 {
63+
label = "red:status";
64+
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
65+
};
66+
};
67+
};
68+
69+
&eth {
70+
status = "okay";
71+
72+
gmac0: mac@0 {
73+
compatible = "mediatek,eth-mac";
74+
reg = <0>;
75+
phy-mode = "2500base-x";
76+
77+
fixed-link {
78+
speed = <2500>;
79+
full-duplex;
80+
pause;
81+
};
82+
};
83+
84+
gmac1: mac@1 {
85+
compatible = "mediatek,eth-mac";
86+
reg = <1>;
87+
phy-mode = "gmii";
88+
phy-handle = <&int_gbe_phy>;
89+
};
90+
};
91+
92+
&mdio_bus {
93+
switch: switch@1f {
94+
compatible = "mediatek,mt7531";
95+
reg = <31>;
96+
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
97+
interrupt-controller;
98+
#interrupt-cells = <1>;
99+
interrupt-parent = <&pio>;
100+
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
101+
};
102+
};
103+
104+
&switch {
105+
ports {
106+
#address-cells = <1>;
107+
#size-cells = <0>;
108+
109+
port@0 {
110+
reg = <0>;
111+
label = "lan3";
112+
};
113+
114+
port@1 {
115+
reg = <1>;
116+
label = "lan2";
117+
};
118+
119+
port@2 {
120+
reg = <2>;
121+
label = "lan1";
122+
};
123+
124+
port@6 {
125+
reg = <6>;
126+
ethernet = <&gmac0>;
127+
phy-mode = "2500base-x";
128+
129+
fixed-link {
130+
speed = <2500>;
131+
full-duplex;
132+
pause;
133+
};
134+
};
135+
};
136+
};
137+
138+
&uart0 {
139+
status = "okay";
140+
};
141+
142+
&usb_phy {
143+
status = "okay";
144+
};
145+
146+
&watchdog {
147+
status = "okay";
148+
};
149+
150+
&wifi {
151+
status = "okay";
152+
};
153+
154+
&xhci {
155+
status = "okay";
156+
};

target/linux/mediatek/filogic/base-files/etc/board.d/02_network

+6
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ mediatek_setup_interfaces()
1818
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
1919
;;
2020
cetron,ct3003*|\
21+
cmcc,rax3000m*|\
2122
fzs,5gcpe-p3|\
2223
jcg,q30-pro|\
2324
qihoo,360t7)
@@ -74,6 +75,11 @@ mediatek_setup_macs()
7475
bananapi,bpi-r3)
7576
wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
7677
;;
78+
cmcc,rax3000m-emmc-ubootmod)
79+
wan_mac=$(mmc_get_mac_binary factory 0x2a)
80+
lan_mac=$(mmc_get_mac_binary factory 0x24)
81+
label_mac=$wan_mac
82+
;;
7783
glinet,gl-mt2500)
7884
label_mac="$(get_mac_binary "/dev/mmcblk0boot1" 0xa)"
7985
wan_mac="$label_mac"

target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata

+7
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,13 @@
77
board=$(board_name)
88

99
case "$FIRMWARE" in
10+
"mediatek/mt7981_eeprom_mt7976_dbdc.bin")
11+
case "$board" in
12+
cmcc,rax3000m-emmc-ubootmod)
13+
caldata_extract_mmc "factory" 0x0 0x1000
14+
;;
15+
esac
16+
;;
1017
"mediatek/mt7986_eeprom_mt7976_dbdc.bin")
1118
case "$board" in
1219
asus,tuf-ax4200)

target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac

+3
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,9 @@ case "$board" in
2424
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
2525
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
2626
;;
27+
cmcc,rax3000m-nand-ubootmod)
28+
[ "$PHYNBR" = "1" ] && mtd_get_mac_binary Factory 0xa > /sys${DEVPATH}/macaddress
29+
;;
2730
cetron,ct3003*)
2831
addr=$(mtd_get_mac_binary "art" 0)
2932
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress

target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh

+1
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ platform_do_upgrade() {
2929
;;
3030
esac
3131
;;
32+
cmcc,rax3000m-emmc-ubootmod|\
3233
glinet,gl-mt2500|\
3334
glinet,gl-mt6000|\
3435
jdcloud,re-cs-05)

0 commit comments

Comments
 (0)