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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| 2 | +; RUN: opt -S -passes=indvars < %s | FileCheck %s |
| 3 | + |
| 4 | +target datalayout = "n64" |
| 5 | + |
| 6 | +declare void @use(i64) |
| 7 | + |
| 8 | +define void @or_disjoint() { |
| 9 | +; CHECK-LABEL: define void @or_disjoint() { |
| 10 | +; CHECK-NEXT: entry: |
| 11 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 12 | +; CHECK: loop: |
| 13 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 2, [[ENTRY:%.*]] ], [ [[IV_DEC:%.*]], [[LOOP]] ] |
| 14 | +; CHECK-NEXT: [[OR:%.*]] = or disjoint i64 [[IV]], 1 |
| 15 | +; CHECK-NEXT: call void @use(i64 [[OR]]) |
| 16 | +; CHECK-NEXT: [[IV_DEC]] = add nsw i64 [[IV]], -1 |
| 17 | +; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_DEC]], 0 |
| 18 | +; CHECK-NEXT: br i1 [[EXIT_COND]], label [[EXIT:%.*]], label [[LOOP]] |
| 19 | +; CHECK: exit: |
| 20 | +; CHECK-NEXT: ret void |
| 21 | +; |
| 22 | +entry: |
| 23 | + br label %loop |
| 24 | + |
| 25 | +loop: |
| 26 | + %iv = phi i64 [ 2, %entry ], [ %iv.dec, %loop ] |
| 27 | + %or = or disjoint i64 %iv, 1 |
| 28 | + %add = add nsw i64 %iv, 1 |
| 29 | + %sel = select i1 false, i64 %or, i64 %add |
| 30 | + call void @use(i64 %sel) |
| 31 | + |
| 32 | + %iv.dec = add nsw i64 %iv, -1 |
| 33 | + %exit.cond = icmp eq i64 %iv.dec, 0 |
| 34 | + br i1 %exit.cond, label %exit, label %loop |
| 35 | + |
| 36 | +exit: |
| 37 | + ret void |
| 38 | +} |
| 39 | + |
| 40 | +define void @add_nowrap_flags(i64 %n) { |
| 41 | +; CHECK-LABEL: define void @add_nowrap_flags( |
| 42 | +; CHECK-SAME: i64 [[N:%.*]]) { |
| 43 | +; CHECK-NEXT: entry: |
| 44 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 45 | +; CHECK: loop: |
| 46 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LOOP]] ] |
| 47 | +; CHECK-NEXT: [[ADD1:%.*]] = add nuw nsw i64 [[IV]], 123 |
| 48 | +; CHECK-NEXT: call void @use(i64 [[ADD1]]) |
| 49 | +; CHECK-NEXT: [[IV_INC]] = add i64 [[IV]], 1 |
| 50 | +; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp eq i64 [[IV_INC]], [[N]] |
| 51 | +; CHECK-NEXT: br i1 [[EXIT_COND]], label [[EXIT:%.*]], label [[LOOP]] |
| 52 | +; CHECK: exit: |
| 53 | +; CHECK-NEXT: ret void |
| 54 | +; |
| 55 | +entry: |
| 56 | + br label %loop |
| 57 | + |
| 58 | +loop: |
| 59 | + %iv = phi i64 [ 0, %entry ], [ %iv.inc, %loop ] |
| 60 | + %add1 = add nuw nsw i64 %iv, 123 |
| 61 | + %add2 = add i64 %iv, 123 |
| 62 | + %sel = select i1 false, i64 %add1, i64 %add2 |
| 63 | + call void @use(i64 %sel) |
| 64 | + |
| 65 | + %iv.inc = add i64 %iv, 1 |
| 66 | + %exit.cond = icmp eq i64 %iv.inc, %n |
| 67 | + br i1 %exit.cond, label %exit, label %loop |
| 68 | + |
| 69 | +exit: |
| 70 | + ret void |
| 71 | +} |
| 72 | + |
| 73 | + |
| 74 | +define void @expander_or_disjoint(i64 %n) { |
| 75 | +; CHECK-LABEL: define void @expander_or_disjoint( |
| 76 | +; CHECK-SAME: i64 [[N:%.*]]) { |
| 77 | +; CHECK-NEXT: entry: |
| 78 | +; CHECK-NEXT: [[OR:%.*]] = or i64 [[N]], 1 |
| 79 | +; CHECK-NEXT: br label [[LOOP:%.*]] |
| 80 | +; CHECK: loop: |
| 81 | +; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[LOOP]] ] |
| 82 | +; CHECK-NEXT: [[IV_INC]] = add i64 [[IV]], 1 |
| 83 | +; CHECK-NEXT: [[ADD:%.*]] = add i64 [[IV]], [[OR]] |
| 84 | +; CHECK-NEXT: call void @use(i64 [[ADD]]) |
| 85 | +; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[IV_INC]], [[OR]] |
| 86 | +; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]] |
| 87 | +; CHECK: exit: |
| 88 | +; CHECK-NEXT: ret void |
| 89 | +; |
| 90 | +entry: |
| 91 | + %or = or disjoint i64 %n, 1 |
| 92 | + br label %loop |
| 93 | + |
| 94 | +loop: |
| 95 | + %iv = phi i64 [ 0, %entry ], [ %iv.inc, %loop ] |
| 96 | + %iv.inc = add i64 %iv, 1 |
| 97 | + %add = add i64 %iv, %or |
| 98 | + call void @use(i64 %add) |
| 99 | + %cmp = icmp ult i64 %iv, %n |
| 100 | + br i1 %cmp, label %loop, label %exit |
| 101 | + |
| 102 | +exit: |
| 103 | + ret void |
| 104 | +} |
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