Improve support for the microkernel matmul path

[newling]

This task description needs improvement but essentially we should do these in order:

1. Improve error messages for cases we don't currently support (example: inner-most tiling of operands not having 64 elements each),

2. improve set of supported cases: different strides, smaller tiles in core memory, etc.

This is related to issue: Xilinx/mlir-aie#1478

Currently we have to be very careful when tiling our matmul that the inner loop has the right matmul shape and striding, otherwise the numerics go haywire.