Skip to content

Commit 8c7b75d

Browse files
JornVerneeJornVernee
committed
Merge branch 'master' into 8254231_linker
2 parents 7cef16f + da97ab5 commit 8c7b75d

File tree

137 files changed

+2046
-1276
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

137 files changed

+2046
-1276
lines changed

‎make/CompileToolsJdk.gmk

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,8 @@ $(eval $(call SetupJavaCompilation, BUILD_TOOLS_JDK, \
5656
DISABLED_WARNINGS := options, \
5757
JAVAC_FLAGS := \
5858
--add-exports java.desktop/sun.awt=ALL-UNNAMED \
59-
--add-exports java.base/sun.text=ALL-UNNAMED, \
59+
--add-exports java.base/sun.text=ALL-UNNAMED \
60+
--add-exports java.base/sun.security.util=ALL-UNNAMED, \
6061
))
6162

6263
TARGETS += $(BUILD_TOOLS_JDK)

‎make/ToolsJdk.gmk

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2011, 2019, Oracle and/or its affiliates. All rights reserved.
2+
# Copyright (c) 2011, 2020, Oracle and/or its affiliates. All rights reserved.
33
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
#
55
# This code is free software; you can redistribute it and/or modify it
@@ -68,6 +68,7 @@ TOOL_TZDB = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
6868
build.tools.tzdb.TzdbZoneRulesCompiler
6969

7070
TOOL_BLACKLISTED_CERTS = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \
71+
--add-exports java.base/sun.security.util=ALL-UNNAMED \
7172
build.tools.blacklistedcertsconverter.BlacklistedCertsConverter
7273

7374
TOOL_MAKEJAVASECURITY = $(JAVA_SMALL) -cp $(BUILDTOOLS_OUTPUTDIR)/jdk_tools_classes \

‎make/data/blacklistedcertsconverter/blacklisted.certs.pem

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
#! java BlacklistedCertsConverter SHA-256
22

3-
# The line above must be the first line of the blacklisted.certs.pem
4-
# file inside src/share/lib/security/. It will be ignored if added in
5-
# src/closed/share/lib/security/blacklisted.certs.pem.
3+
# The line above must be the first line of this file. Do not
4+
# remove it.
65

76
// Subject: CN=Digisign Server ID (Enrich),
87
// OU=457608-K,

‎make/jdk/src/classes/build/tools/blacklistedcertsconverter/BlacklistedCertsConverter.java

Lines changed: 95 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2013, 2020, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -25,14 +25,24 @@
2525

2626
package build.tools.blacklistedcertsconverter;
2727

28+
import java.io.IOException;
29+
import java.math.BigInteger;
2830
import java.security.MessageDigest;
31+
import java.security.PublicKey;
2932
import java.security.cert.Certificate;
3033
import java.security.cert.CertificateFactory;
3134
import java.security.cert.X509Certificate;
35+
import java.security.interfaces.ECPublicKey;
36+
import java.util.ArrayList;
37+
import java.util.Arrays;
3238
import java.util.Collection;
39+
import java.util.List;
3340
import java.util.Set;
3441
import java.util.TreeSet;
3542

43+
import sun.security.util.DerInputStream;
44+
import sun.security.util.DerOutputStream;
45+
import sun.security.util.DerValue;
3646

3747
/**
3848
* Converts blacklisted.certs.pem from System.in to blacklisted.certs in
@@ -75,8 +85,8 @@ public static void main(String[] args) throws Exception {
7585
// Output sorted so that it's easy to locate an entry.
7686
Set<String> fingerprints = new TreeSet<>();
7787
for (Certificate cert: certs) {
78-
fingerprints.add(
79-
getCertificateFingerPrint(mdAlg, (X509Certificate)cert));
88+
fingerprints.addAll(
89+
getCertificateFingerPrints(mdAlg, (X509Certificate)cert));
8090
}
8191

8292
for (String s: fingerprints) {
@@ -97,17 +107,90 @@ private static void byte2hex(byte b, StringBuffer buf) {
97107
}
98108

99109
/**
100-
* Gets the requested finger print of the certificate.
110+
* Computes the possible fingerprints of the certificate.
101111
*/
102-
private static String getCertificateFingerPrint(
112+
private static List<String> getCertificateFingerPrints(
103113
String mdAlg, X509Certificate cert) throws Exception {
104-
byte[] encCertInfo = cert.getEncoded();
105-
MessageDigest md = MessageDigest.getInstance(mdAlg);
106-
byte[] digest = md.digest(encCertInfo);
107-
StringBuffer buf = new StringBuffer();
108-
for (int i = 0; i < digest.length; i++) {
109-
byte2hex(digest[i], buf);
114+
List<String> fingerprints = new ArrayList<>();
115+
for (byte[] encoding : altEncodings(cert)) {
116+
MessageDigest md = MessageDigest.getInstance(mdAlg);
117+
byte[] digest = md.digest(encoding);
118+
StringBuffer buf = new StringBuffer();
119+
for (int i = 0; i < digest.length; i++) {
120+
byte2hex(digest[i], buf);
121+
}
122+
fingerprints.add(buf.toString());
123+
}
124+
return fingerprints;
125+
}
126+
127+
private static List<byte[]> altEncodings(X509Certificate c)
128+
throws Exception {
129+
List<byte[]> result = new ArrayList<>();
130+
131+
DerValue d = new DerValue(c.getEncoded());
132+
DerValue[] seq = new DerValue[3];
133+
// tbsCertificate
134+
seq[0] = d.data.getDerValue();
135+
// signatureAlgorithm
136+
seq[1] = d.data.getDerValue();
137+
// signature
138+
seq[2] = d.data.getDerValue();
139+
140+
List<DerValue> algIds = Arrays.asList(seq[1], altAlgId(seq[1]));
141+
142+
List<DerValue> sigs;
143+
PublicKey p = c.getPublicKey();
144+
if (p instanceof ECPublicKey) {
145+
ECPublicKey ep = (ECPublicKey) p;
146+
BigInteger mod = ep.getParams().getOrder();
147+
sigs = Arrays.asList(seq[2], altSig(mod, seq[2]));
148+
} else {
149+
sigs = Arrays.asList(seq[2]);
150+
}
151+
152+
for (DerValue algId : algIds) {
153+
for (DerValue sig : sigs) {
154+
DerOutputStream tmp = new DerOutputStream();
155+
tmp.putDerValue(seq[0]);
156+
tmp.putDerValue(algId);
157+
tmp.putDerValue(sig);
158+
DerOutputStream tmp2 = new DerOutputStream();
159+
tmp2.write(DerValue.tag_Sequence, tmp);
160+
result.add(tmp2.toByteArray());
161+
}
162+
}
163+
return result;
164+
}
165+
166+
private static DerValue altSig(BigInteger mod, DerValue sig)
167+
throws IOException {
168+
byte[] sigBits = sig.getBitString();
169+
DerInputStream in =
170+
new DerInputStream(sigBits, 0, sigBits.length, false);
171+
DerValue[] values = in.getSequence(2);
172+
BigInteger r = values[0].getBigInteger();
173+
BigInteger s = values[1].getBigInteger();
174+
BigInteger s2 = s.negate().mod(mod);
175+
DerOutputStream out = new DerOutputStream();
176+
out.putInteger(r);
177+
out.putInteger(s2);
178+
DerOutputStream tmp = new DerOutputStream();
179+
tmp.putBitString(new DerValue(DerValue.tag_Sequence,
180+
out.toByteArray()).toByteArray());
181+
return new DerValue(tmp.toByteArray());
182+
}
183+
184+
private static DerValue altAlgId(DerValue algId) throws IOException {
185+
DerInputStream in = algId.toDerInputStream();
186+
DerOutputStream bytes = new DerOutputStream();
187+
bytes.putOID(in.getOID());
188+
// encode parameters as NULL if not present or omit if NULL
189+
if (in.available() == 0) {
190+
bytes.putNull();
110191
}
111-
return buf.toString();
192+
DerOutputStream tmp = new DerOutputStream();
193+
tmp.write(DerValue.tag_Sequence, bytes);
194+
return new DerValue(tmp.toByteArray());
112195
}
113196
}

‎src/hotspot/cpu/aarch64/aarch64_sve.ad

Lines changed: 67 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -159,6 +159,31 @@ source %{
159159
case Op_ExtractL:
160160
case Op_ExtractS:
161161
case Op_ExtractUB:
162+
// Vector API specific
163+
case Op_AndReductionV:
164+
case Op_OrReductionV:
165+
case Op_XorReductionV:
166+
case Op_MaxReductionV:
167+
case Op_MinReductionV:
168+
case Op_LoadVectorGather:
169+
case Op_StoreVectorScatter:
170+
case Op_VectorBlend:
171+
case Op_VectorCast:
172+
case Op_VectorCastB2X:
173+
case Op_VectorCastD2X:
174+
case Op_VectorCastF2X:
175+
case Op_VectorCastI2X:
176+
case Op_VectorCastL2X:
177+
case Op_VectorCastS2X:
178+
case Op_VectorInsert:
179+
case Op_VectorLoadConst:
180+
case Op_VectorLoadMask:
181+
case Op_VectorLoadShuffle:
182+
case Op_VectorMaskCmp:
183+
case Op_VectorRearrange:
184+
case Op_VectorReinterpret:
185+
case Op_VectorStoreMask:
186+
case Op_VectorTest:
162187
return false;
163188
default:
164189
return true;
@@ -846,9 +871,49 @@ instruct vpopcountI(vReg dst, vReg src) %{
846871

847872
// vector add reduction
848873

874+
instruct reduce_addB(iRegINoSp dst, iRegIorL2I src1, vReg src2, vRegD tmp) %{
875+
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
876+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_BYTE);
877+
match(Set dst (AddReductionVI src1 src2));
878+
effect(TEMP_DEF dst, TEMP tmp);
879+
ins_cost(SVE_COST);
880+
format %{ "sve_uaddv $tmp, $src2\t# vector (sve) (B)\n\t"
881+
"smov $dst, $tmp, B, 0\n\t"
882+
"addw $dst, $dst, $src1\n\t"
883+
"sxtb $dst, $dst\t # add reduction B" %}
884+
ins_encode %{
885+
__ sve_uaddv(as_FloatRegister($tmp$$reg), __ B,
886+
ptrue, as_FloatRegister($src2$$reg));
887+
__ smov($dst$$Register, as_FloatRegister($tmp$$reg), __ B, 0);
888+
__ addw($dst$$Register, $dst$$Register, $src1$$Register);
889+
__ sxtb($dst$$Register, $dst$$Register);
890+
%}
891+
ins_pipe(pipe_slow);
892+
%}
893+
894+
instruct reduce_addS(iRegINoSp dst, iRegIorL2I src1, vReg src2, vRegD tmp) %{
895+
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
896+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_SHORT);
897+
match(Set dst (AddReductionVI src1 src2));
898+
effect(TEMP_DEF dst, TEMP tmp);
899+
ins_cost(SVE_COST);
900+
format %{ "sve_uaddv $tmp, $src2\t# vector (sve) (H)\n\t"
901+
"smov $dst, $tmp, H, 0\n\t"
902+
"addw $dst, $dst, $src1\n\t"
903+
"sxth $dst, $dst\t # add reduction H" %}
904+
ins_encode %{
905+
__ sve_uaddv(as_FloatRegister($tmp$$reg), __ H,
906+
ptrue, as_FloatRegister($src2$$reg));
907+
__ smov($dst$$Register, as_FloatRegister($tmp$$reg), __ H, 0);
908+
__ addw($dst$$Register, $dst$$Register, $src1$$Register);
909+
__ sxth($dst$$Register, $dst$$Register);
910+
%}
911+
ins_pipe(pipe_slow);
912+
%}
913+
849914
instruct reduce_addI(iRegINoSp dst, iRegIorL2I src1, vReg src2, vRegD tmp) %{
850915
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
851-
(n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_INT));
916+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_INT);
852917
match(Set dst (AddReductionVI src1 src2));
853918
effect(TEMP_DEF dst, TEMP tmp);
854919
ins_cost(SVE_COST);
@@ -866,7 +931,7 @@ instruct reduce_addI(iRegINoSp dst, iRegIorL2I src1, vReg src2, vRegD tmp) %{
866931

867932
instruct reduce_addL(iRegLNoSp dst, iRegL src1, vReg src2, vRegD tmp) %{
868933
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
869-
(n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_LONG));
934+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == T_LONG);
870935
match(Set dst (AddReductionVL src1 src2));
871936
effect(TEMP_DEF dst, TEMP tmp);
872937
ins_cost(SVE_COST);

‎src/hotspot/cpu/aarch64/aarch64_sve_ad.m4

Lines changed: 53 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -146,6 +146,31 @@ source %{
146146
case Op_ExtractL:
147147
case Op_ExtractS:
148148
case Op_ExtractUB:
149+
// Vector API specific
150+
case Op_AndReductionV:
151+
case Op_OrReductionV:
152+
case Op_XorReductionV:
153+
case Op_MaxReductionV:
154+
case Op_MinReductionV:
155+
case Op_LoadVectorGather:
156+
case Op_StoreVectorScatter:
157+
case Op_VectorBlend:
158+
case Op_VectorCast:
159+
case Op_VectorCastB2X:
160+
case Op_VectorCastD2X:
161+
case Op_VectorCastF2X:
162+
case Op_VectorCastI2X:
163+
case Op_VectorCastL2X:
164+
case Op_VectorCastS2X:
165+
case Op_VectorInsert:
166+
case Op_VectorLoadConst:
167+
case Op_VectorLoadMask:
168+
case Op_VectorLoadShuffle:
169+
case Op_VectorMaskCmp:
170+
case Op_VectorRearrange:
171+
case Op_VectorReinterpret:
172+
case Op_VectorStoreMask:
173+
case Op_VectorTest:
149174
return false;
150175
default:
151176
return true;
@@ -507,15 +532,38 @@ instruct vpopcountI(vReg dst, vReg src) %{
507532
__ sve_cnt(as_FloatRegister($dst$$reg), __ S, ptrue, as_FloatRegister($src$$reg));
508533
%}
509534
ins_pipe(pipe_slow);
510-
%}
535+
%}dnl
511536

537+
dnl
538+
dnl REDUCE_ADD_EXT($1, $2, $3, $4, $5, $6, $7 )
539+
dnl REDUCE_ADD_EXT(insn_name, op_name, reg_dst, reg_src, size, elem_type, insn1)
540+
define(`REDUCE_ADD_EXT', `
541+
instruct $1($3 dst, $4 src1, vReg src2, vRegD tmp) %{
542+
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
543+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == $6);
544+
match(Set dst ($2 src1 src2));
545+
effect(TEMP_DEF dst, TEMP tmp);
546+
ins_cost(SVE_COST);
547+
format %{ "sve_uaddv $tmp, $src2\t# vector (sve) ($5)\n\t"
548+
"smov $dst, $tmp, $5, 0\n\t"
549+
"addw $dst, $dst, $src1\n\t"
550+
"$7 $dst, $dst\t # add reduction $5" %}
551+
ins_encode %{
552+
__ sve_uaddv(as_FloatRegister($tmp$$reg), __ $5,
553+
ptrue, as_FloatRegister($src2$$reg));
554+
__ smov($dst$$Register, as_FloatRegister($tmp$$reg), __ $5, 0);
555+
__ addw($dst$$Register, $dst$$Register, $src1$$Register);
556+
__ $7($dst$$Register, $dst$$Register);
557+
%}
558+
ins_pipe(pipe_slow);
559+
%}')dnl
512560
dnl
513561
dnl REDUCE_ADD($1, $2, $3, $4, $5, $6, $7 )
514562
dnl REDUCE_ADD(insn_name, op_name, reg_dst, reg_src, size, elem_type, insn1)
515563
define(`REDUCE_ADD', `
516564
instruct $1($3 dst, $4 src1, vReg src2, vRegD tmp) %{
517565
predicate(UseSVE > 0 && n->in(2)->bottom_type()->is_vect()->length_in_bytes() >= 16 &&
518-
ELEMENT_SHORT_CHAR($6, n->in(2)));
566+
n->in(2)->bottom_type()->is_vect()->element_basic_type() == $6);
519567
match(Set dst ($2 src1 src2));
520568
effect(TEMP_DEF dst, TEMP tmp);
521569
ins_cost(SVE_COST);
@@ -545,8 +593,10 @@ instruct $1($3 src1_dst, vReg src2) %{
545593
%}
546594
ins_pipe(pipe_slow);
547595
%}')dnl
548-
dnl
596+
549597
// vector add reduction
598+
REDUCE_ADD_EXT(reduce_addB, AddReductionVI, iRegINoSp, iRegIorL2I, B, T_BYTE, sxtb)
599+
REDUCE_ADD_EXT(reduce_addS, AddReductionVI, iRegINoSp, iRegIorL2I, H, T_SHORT, sxth)
550600
REDUCE_ADD(reduce_addI, AddReductionVI, iRegINoSp, iRegIorL2I, S, T_INT, addw)
551601
REDUCE_ADD(reduce_addL, AddReductionVL, iRegLNoSp, iRegL, D, T_LONG, add)
552602
REDUCE_ADDF(reduce_addF, AddReductionVF, vRegF, S)

‎src/hotspot/cpu/x86/macroAssembler_x86.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4075,6 +4075,9 @@ class ControlWord {
40754075
case 1: rc = "round down"; break;
40764076
case 2: rc = "round up "; break;
40774077
case 3: rc = "chop "; break;
4078+
default:
4079+
rc = NULL; // silence compiler warnings
4080+
fatal("Unknown rounding control: %d", rounding_control());
40784081
};
40794082
// precision control
40804083
const char* pc;
@@ -4083,6 +4086,9 @@ class ControlWord {
40834086
case 1: pc = "reserved"; break;
40844087
case 2: pc = "53 bits "; break;
40854088
case 3: pc = "64 bits "; break;
4089+
default:
4090+
pc = NULL; // silence compiler warnings
4091+
fatal("Unknown precision control: %d", precision_control());
40864092
};
40874093
// flags
40884094
char f[9];

‎src/hotspot/cpu/zero/zeroInterpreter_zero.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -596,6 +596,9 @@ int ZeroInterpreter::accessor_entry(Method* method, intptr_t UNUSED, TRAPS) {
596596
break;
597597
}
598598
if (entry->is_volatile()) {
599+
if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
600+
OrderAccess::fence();
601+
}
599602
switch (entry->flag_state()) {
600603
case ctos:
601604
SET_LOCALS_INT(object->char_field_acquire(entry->f2_as_index()), 0);

0 commit comments

Comments
 (0)