@@ -12381,27 +12381,27 @@ instruct countTrailingZerosL_cnttzd(iRegIdst dst, iRegLsrc src) %{
1238112381%}
1238212382
1238312383// Expand nodes for byte_reverse_int.
12384- instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 pos , immI16 shift ) %{
12385- effect(DEF dst, USE src, USE pos , USE shift );
12384+ instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 n , immI16 b ) %{
12385+ effect(DEF dst, USE src, USE n , USE b );
1238612386 predicate(false);
1238712387
12388- format %{ "INSRWI $dst, $src, $pos , $shift " %}
12388+ format %{ "INSRWI $dst, $src, $n , $b " %}
1238912389 size(4);
1239012390 ins_encode %{
12391- __ insrwi($dst$$Register, $src$$Register, $shift $$constant, $pos $$constant);
12391+ __ insrwi($dst$$Register, $src$$Register, $n $$constant, $b $$constant);
1239212392 %}
1239312393 ins_pipe(pipe_class_default);
1239412394%}
1239512395
1239612396// As insrwi_a, but with USE_DEF.
12397- instruct insrwi(iRegIdst dst, iRegIsrc src, immI16 pos , immI16 shift ) %{
12398- effect(USE_DEF dst, USE src, USE pos , USE shift );
12397+ instruct insrwi(iRegIdst dst, iRegIsrc src, immI16 n , immI16 b ) %{
12398+ effect(USE_DEF dst, USE src, USE n , USE b );
1239912399 predicate(false);
1240012400
12401- format %{ "INSRWI $dst, $src, $pos , $shift " %}
12401+ format %{ "INSRWI $dst, $src, $n , $b " %}
1240212402 size(4);
1240312403 ins_encode %{
12404- __ insrwi($dst$$Register, $src$$Register, $shift $$constant, $pos $$constant);
12404+ __ insrwi($dst$$Register, $src$$Register, $n $$constant, $b $$constant);
1240512405 %}
1240612406 ins_pipe(pipe_class_default);
1240712407%}
@@ -12423,12 +12423,12 @@ instruct bytes_reverse_int_Ex(iRegIdst dst, iRegIsrc src) %{
1242312423 iRegLdst tmpI3;
1242412424
1242512425 urShiftI_reg_imm(tmpI1, src, imm24);
12426- insrwi_a(dst, tmpI1, imm24, imm8 );
12426+ insrwi_a(dst, tmpI1, imm8, imm24 );
1242712427 urShiftI_reg_imm(tmpI2, src, imm16);
12428- insrwi(dst, tmpI2, imm8, imm16 );
12428+ insrwi(dst, tmpI2, imm16, imm8 );
1242912429 urShiftI_reg_imm(tmpI3, src, imm8);
1243012430 insrwi(dst, tmpI3, imm8, imm8);
12431- insrwi(dst, src, imm0, imm8 );
12431+ insrwi(dst, src, imm8, imm0 );
1243212432 %}
1243312433%}
1243412434
@@ -12546,7 +12546,7 @@ instruct bytes_reverse_ushort_Ex(iRegIdst dst, iRegIsrc src) %{
1254612546 immI16 imm8 %{ (int) 8 %}
1254712547
1254812548 urShiftI_reg_imm(dst, src, imm8);
12549- insrwi(dst, src, imm16, imm8 );
12549+ insrwi(dst, src, imm8, imm16 );
1255012550 %}
1255112551%}
1255212552
@@ -12575,7 +12575,7 @@ instruct bytes_reverse_short_Ex(iRegIdst dst, iRegIsrc src) %{
1257512575 iRegLdst tmpI1;
1257612576
1257712577 urShiftI_reg_imm(tmpI1, src, imm8);
12578- insrwi(tmpI1, src, imm16, imm8 );
12578+ insrwi(tmpI1, src, imm8, imm16 );
1257912579 extsh(dst, tmpI1);
1258012580 %}
1258112581%}
0 commit comments