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author
Sandhya Viswanathan
committed
8259278: Optimize Vector API slice and unslice operations
Reviewed-by: psandoz, vlivanov
1 parent da6bcf9 commit a6b2162

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45 files changed

+460
-717
lines changed

src/hotspot/cpu/x86/macroAssembler_x86.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3006,6 +3006,16 @@ void MacroAssembler::vaddss(XMMRegister dst, XMMRegister nds, AddressLiteral src
30063006
}
30073007
}
30083008

3009+
void MacroAssembler::vpaddb(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch) {
3010+
assert(UseAVX > 0, "requires some form of AVX");
3011+
if (reachable(src)) {
3012+
Assembler::vpaddb(dst, nds, as_Address(src), vector_len);
3013+
} else {
3014+
lea(rscratch, src);
3015+
Assembler::vpaddb(dst, nds, Address(rscratch, 0), vector_len);
3016+
}
3017+
}
3018+
30093019
void MacroAssembler::vpaddd(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch) {
30103020
assert(UseAVX > 0, "requires some form of AVX");
30113021
if (reachable(src)) {

src/hotspot/cpu/x86/macroAssembler_x86.hpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -1241,6 +1241,7 @@ class MacroAssembler: public Assembler {
12411241

12421242
void vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
12431243
void vpaddb(XMMRegister dst, XMMRegister nds, Address src, int vector_len);
1244+
void vpaddb(XMMRegister dst, XMMRegister nds, AddressLiteral src, int vector_len, Register rscratch);
12441245

12451246
void vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len);
12461247
void vpaddw(XMMRegister dst, XMMRegister nds, Address src, int vector_len);

src/hotspot/cpu/x86/stubGenerator_x86_32.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1999, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -610,6 +610,21 @@ class StubGenerator: public StubCodeGenerator {
610610
return start;
611611
}
612612

613+
address generate_vector_byte_shuffle_mask(const char *stub_name) {
614+
__ align(CodeEntryAlignment);
615+
StubCodeMark mark(this, "StubRoutines", stub_name);
616+
address start = __ pc();
617+
__ emit_data(0x70707070, relocInfo::none, 0);
618+
__ emit_data(0x70707070, relocInfo::none, 0);
619+
__ emit_data(0x70707070, relocInfo::none, 0);
620+
__ emit_data(0x70707070, relocInfo::none, 0);
621+
__ emit_data(0xF0F0F0F0, relocInfo::none, 0);
622+
__ emit_data(0xF0F0F0F0, relocInfo::none, 0);
623+
__ emit_data(0xF0F0F0F0, relocInfo::none, 0);
624+
__ emit_data(0xF0F0F0F0, relocInfo::none, 0);
625+
return start;
626+
}
627+
613628
address generate_vector_mask_long_double(const char *stub_name, int32_t maskhi, int32_t masklo) {
614629
__ align(CodeEntryAlignment);
615630
StubCodeMark mark(this, "StubRoutines", stub_name);
@@ -3966,6 +3981,7 @@ class StubGenerator: public StubCodeGenerator {
39663981
StubRoutines::x86::_vector_64_bit_mask = generate_vector_custom_i32("vector_64_bit_mask", Assembler::AVX_512bit,
39673982
0xFFFFFFFF, 0xFFFFFFFF, 0, 0);
39683983
StubRoutines::x86::_vector_int_shuffle_mask = generate_vector_mask("vector_int_shuffle_mask", 0x03020100);
3984+
StubRoutines::x86::_vector_byte_shuffle_mask = generate_vector_byte_shuffle_mask("vector_byte_shuffle_mask");
39693985
StubRoutines::x86::_vector_short_shuffle_mask = generate_vector_mask("vector_short_shuffle_mask", 0x01000100);
39703986
StubRoutines::x86::_vector_long_shuffle_mask = generate_vector_mask_long_double("vector_long_shuffle_mask", 0x00000001, 0x0);
39713987
StubRoutines::x86::_vector_byte_perm_mask = generate_vector_byte_perm_mask("vector_byte_perm_mask");

src/hotspot/cpu/x86/stubGenerator_x86_64.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -808,6 +808,17 @@ class StubGenerator: public StubCodeGenerator {
808808
return start;
809809
}
810810

811+
address generate_vector_byte_shuffle_mask(const char *stub_name) {
812+
__ align(CodeEntryAlignment);
813+
StubCodeMark mark(this, "StubRoutines", stub_name);
814+
address start = __ pc();
815+
__ emit_data64(0x7070707070707070, relocInfo::none);
816+
__ emit_data64(0x7070707070707070, relocInfo::none);
817+
__ emit_data64(0xF0F0F0F0F0F0F0F0, relocInfo::none);
818+
__ emit_data64(0xF0F0F0F0F0F0F0F0, relocInfo::none);
819+
return start;
820+
}
821+
811822
address generate_fp_mask(const char *stub_name, int64_t mask) {
812823
__ align(CodeEntryAlignment);
813824
StubCodeMark mark(this, "StubRoutines", stub_name);
@@ -6828,6 +6839,7 @@ address generate_avx_ghash_processBlocks() {
68286839
StubRoutines::x86::_vector_64_bit_mask = generate_vector_custom_i32("vector_64_bit_mask", Assembler::AVX_512bit,
68296840
0xFFFFFFFF, 0xFFFFFFFF, 0, 0);
68306841
StubRoutines::x86::_vector_int_shuffle_mask = generate_vector_mask("vector_int_shuffle_mask", 0x0302010003020100);
6842+
StubRoutines::x86::_vector_byte_shuffle_mask = generate_vector_byte_shuffle_mask("vector_byte_shuffle_mask");
68316843
StubRoutines::x86::_vector_short_shuffle_mask = generate_vector_mask("vector_short_shuffle_mask", 0x0100010001000100);
68326844
StubRoutines::x86::_vector_long_shuffle_mask = generate_vector_mask("vector_long_shuffle_mask", 0x0000000100000000);
68336845
StubRoutines::x86::_vector_long_sign_mask = generate_vector_mask("vector_long_sign_mask", 0x8000000000000000);

src/hotspot/cpu/x86/stubRoutines_x86.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2013, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -47,6 +47,7 @@ address StubRoutines::x86::_vector_short_to_byte_mask = NULL;
4747
address StubRoutines::x86::_vector_int_to_byte_mask = NULL;
4848
address StubRoutines::x86::_vector_int_to_short_mask = NULL;
4949
address StubRoutines::x86::_vector_all_bits_set = NULL;
50+
address StubRoutines::x86::_vector_byte_shuffle_mask = NULL;
5051
address StubRoutines::x86::_vector_short_shuffle_mask = NULL;
5152
address StubRoutines::x86::_vector_int_shuffle_mask = NULL;
5253
address StubRoutines::x86::_vector_long_shuffle_mask = NULL;

src/hotspot/cpu/x86/stubRoutines_x86.hpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2013, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2013, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -149,6 +149,7 @@ class x86 {
149149
static address _vector_32_bit_mask;
150150
static address _vector_64_bit_mask;
151151
static address _vector_int_shuffle_mask;
152+
static address _vector_byte_shuffle_mask;
152153
static address _vector_short_shuffle_mask;
153154
static address _vector_long_shuffle_mask;
154155
static address _vector_iota_indices;
@@ -280,6 +281,10 @@ class x86 {
280281
return _vector_int_shuffle_mask;
281282
}
282283

284+
static address vector_byte_shuffle_mask() {
285+
return _vector_byte_shuffle_mask;
286+
}
287+
283288
static address vector_short_shuffle_mask() {
284289
return _vector_short_shuffle_mask;
285290
}

src/hotspot/cpu/x86/x86.ad

Lines changed: 66 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
//
2-
// Copyright (c) 2011, 2020, Oracle and/or its affiliates. All rights reserved.
2+
// Copyright (c) 2011, 2021, Oracle and/or its affiliates. All rights reserved.
33
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
//
55
// This code is free software; you can redistribute it and/or modify it
@@ -1354,6 +1354,7 @@ Assembler::Width widthForType(BasicType bt) {
13541354
static address vector_long_sign_mask() { return StubRoutines::x86::vector_long_sign_mask(); }
13551355
static address vector_all_bits_set() { return StubRoutines::x86::vector_all_bits_set(); }
13561356
static address vector_int_to_short_mask() { return StubRoutines::x86::vector_int_to_short_mask(); }
1357+
static address vector_byte_shufflemask() { return StubRoutines::x86::vector_byte_shuffle_mask(); }
13571358
static address vector_short_shufflemask() { return StubRoutines::x86::vector_short_shuffle_mask(); }
13581359
static address vector_int_shufflemask() { return StubRoutines::x86::vector_int_shuffle_mask(); }
13591360
static address vector_long_shufflemask() { return StubRoutines::x86::vector_long_shuffle_mask(); }
@@ -1691,9 +1692,9 @@ const bool Matcher::match_rule_supported_vector(int opcode, int vlen, BasicType
16911692
return false; // Implementation limitation due to how shuffle is loaded
16921693
} else if (size_in_bits == 256 && UseAVX < 2) {
16931694
return false; // Implementation limitation
1694-
} else if (bt == T_BYTE && size_in_bits >= 256 && !VM_Version::supports_avx512_vbmi()) {
1695+
} else if (bt == T_BYTE && size_in_bits > 256 && !VM_Version::supports_avx512_vbmi()) {
16951696
return false; // Implementation limitation
1696-
} else if (bt == T_SHORT && size_in_bits >= 256 && !VM_Version::supports_avx512bw()) {
1697+
} else if (bt == T_SHORT && size_in_bits > 256 && !VM_Version::supports_avx512bw()) {
16971698
return false; // Implementation limitation
16981699
}
16991700
break;
@@ -7500,13 +7501,24 @@ instruct rearrangeB(vec dst, vec shuffle) %{
75007501
ins_pipe( pipe_slow );
75017502
%}
75027503

7503-
instruct rearrangeB_avx(vec dst, vec src, vec shuffle) %{
7504+
instruct rearrangeB_avx(legVec dst, legVec src, vec shuffle, legVec vtmp1, legVec vtmp2, rRegP scratch) %{
75047505
predicate(vector_element_basic_type(n) == T_BYTE &&
75057506
vector_length(n) == 32 && !VM_Version::supports_avx512_vbmi());
75067507
match(Set dst (VectorRearrange src shuffle));
7507-
format %{ "vector_rearrange $dst, $shuffle, $src" %}
7508+
effect(TEMP dst, TEMP vtmp1, TEMP vtmp2, TEMP scratch);
7509+
format %{ "vector_rearrange $dst, $shuffle, $src\t! using $vtmp1, $vtmp2, $scratch as TEMP" %}
75087510
ins_encode %{
7509-
__ vpshufb($dst$$XMMRegister, $shuffle$$XMMRegister, $src$$XMMRegister, Assembler::AVX_256bit);
7511+
assert(UseAVX >= 2, "required");
7512+
// Swap src into vtmp1
7513+
__ vperm2i128($vtmp1$$XMMRegister, $src$$XMMRegister, $src$$XMMRegister, 1);
7514+
// Shuffle swapped src to get entries from other 128 bit lane
7515+
__ vpshufb($vtmp1$$XMMRegister, $vtmp1$$XMMRegister, $shuffle$$XMMRegister, Assembler::AVX_256bit);
7516+
// Shuffle original src to get entries from self 128 bit lane
7517+
__ vpshufb($dst$$XMMRegister, $src$$XMMRegister, $shuffle$$XMMRegister, Assembler::AVX_256bit);
7518+
// Create a blend mask by setting high bits for entries coming from other lane in shuffle
7519+
__ vpaddb($vtmp2$$XMMRegister, $shuffle$$XMMRegister, ExternalAddress(vector_byte_shufflemask()), Assembler::AVX_256bit, $scratch$$Register);
7520+
// Perform the blend
7521+
__ vpblendvb($dst$$XMMRegister, $dst$$XMMRegister, $vtmp1$$XMMRegister, $vtmp2$$XMMRegister, Assembler::AVX_256bit);
75107522
%}
75117523
ins_pipe( pipe_slow );
75127524
%}
@@ -7527,26 +7539,40 @@ instruct rearrangeB_evex(vec dst, vec src, vec shuffle) %{
75277539

75287540
instruct loadShuffleS(vec dst, vec src, vec vtmp, rRegP scratch) %{
75297541
predicate(vector_element_basic_type(n) == T_SHORT &&
7530-
vector_length(n) <= 8 && !VM_Version::supports_avx512bw()); // NB! aligned with rearrangeS
7542+
vector_length(n) <= 16 && !VM_Version::supports_avx512bw()); // NB! aligned with rearrangeS
75317543
match(Set dst (VectorLoadShuffle src));
75327544
effect(TEMP dst, TEMP vtmp, TEMP scratch);
75337545
format %{ "vector_load_shuffle $dst, $src\t! using $vtmp and $scratch as TEMP" %}
75347546
ins_encode %{
75357547
// Create a byte shuffle mask from short shuffle mask
75367548
// only byte shuffle instruction available on these platforms
7549+
int vlen_in_bytes = vector_length_in_bytes(this);
7550+
if (vlen_in_bytes <= 8) {
7551+
// Multiply each shuffle by two to get byte index
7552+
__ pmovzxbw($vtmp$$XMMRegister, $src$$XMMRegister);
7553+
__ psllw($vtmp$$XMMRegister, 1);
7554+
7555+
// Duplicate to create 2 copies of byte index
7556+
__ movdqu($dst$$XMMRegister, $vtmp$$XMMRegister);
7557+
__ psllw($dst$$XMMRegister, 8);
7558+
__ por($dst$$XMMRegister, $vtmp$$XMMRegister);
7559+
7560+
// Add one to get alternate byte index
7561+
__ movdqu($vtmp$$XMMRegister, ExternalAddress(vector_short_shufflemask()), $scratch$$Register);
7562+
__ paddb($dst$$XMMRegister, $vtmp$$XMMRegister);
7563+
} else {
7564+
int vlen_enc = vector_length_encoding(this);
7565+
// Multiply each shuffle by two to get byte index
7566+
__ vpmovzxbw($vtmp$$XMMRegister, $src$$XMMRegister, vlen_enc);
7567+
__ vpsllw($vtmp$$XMMRegister, $vtmp$$XMMRegister, 1, vlen_enc);
75377568

7538-
// Multiply each shuffle by two to get byte index
7539-
__ pmovzxbw($vtmp$$XMMRegister, $src$$XMMRegister);
7540-
__ psllw($vtmp$$XMMRegister, 1);
7541-
7542-
// Duplicate to create 2 copies of byte index
7543-
__ movdqu($dst$$XMMRegister, $vtmp$$XMMRegister);
7544-
__ psllw($dst$$XMMRegister, 8);
7545-
__ por($dst$$XMMRegister, $vtmp$$XMMRegister);
7569+
// Duplicate to create 2 copies of byte index
7570+
__ vpsllw($dst$$XMMRegister, $vtmp$$XMMRegister, 8, vlen_enc);
7571+
__ vpor($dst$$XMMRegister, $dst$$XMMRegister, $vtmp$$XMMRegister, vlen_enc);
75467572

7547-
// Add one to get alternate byte index
7548-
__ movdqu($vtmp$$XMMRegister, ExternalAddress(vector_short_shufflemask()), $scratch$$Register);
7549-
__ paddb($dst$$XMMRegister, $vtmp$$XMMRegister);
7573+
// Add one to get alternate byte index
7574+
__ vpaddb($dst$$XMMRegister, $dst$$XMMRegister, ExternalAddress(vector_short_shufflemask()), vlen_enc, $scratch$$Register);
7575+
}
75507576
%}
75517577
ins_pipe( pipe_slow );
75527578
%}
@@ -7563,6 +7589,28 @@ instruct rearrangeS(vec dst, vec shuffle) %{
75637589
ins_pipe( pipe_slow );
75647590
%}
75657591

7592+
instruct rearrangeS_avx(legVec dst, legVec src, vec shuffle, legVec vtmp1, legVec vtmp2, rRegP scratch) %{
7593+
predicate(vector_element_basic_type(n) == T_SHORT &&
7594+
vector_length(n) == 16 && !VM_Version::supports_avx512bw());
7595+
match(Set dst (VectorRearrange src shuffle));
7596+
effect(TEMP dst, TEMP vtmp1, TEMP vtmp2, TEMP scratch);
7597+
format %{ "vector_rearrange $dst, $shuffle, $src\t! using $vtmp1, $vtmp2, $scratch as TEMP" %}
7598+
ins_encode %{
7599+
assert(UseAVX >= 2, "required");
7600+
// Swap src into vtmp1
7601+
__ vperm2i128($vtmp1$$XMMRegister, $src$$XMMRegister, $src$$XMMRegister, 1);
7602+
// Shuffle swapped src to get entries from other 128 bit lane
7603+
__ vpshufb($vtmp1$$XMMRegister, $vtmp1$$XMMRegister, $shuffle$$XMMRegister, Assembler::AVX_256bit);
7604+
// Shuffle original src to get entries from self 128 bit lane
7605+
__ vpshufb($dst$$XMMRegister, $src$$XMMRegister, $shuffle$$XMMRegister, Assembler::AVX_256bit);
7606+
// Create a blend mask by setting high bits for entries coming from other lane in shuffle
7607+
__ vpaddb($vtmp2$$XMMRegister, $shuffle$$XMMRegister, ExternalAddress(vector_byte_shufflemask()), Assembler::AVX_256bit, $scratch$$Register);
7608+
// Perform the blend
7609+
__ vpblendvb($dst$$XMMRegister, $dst$$XMMRegister, $vtmp1$$XMMRegister, $vtmp2$$XMMRegister, Assembler::AVX_256bit);
7610+
%}
7611+
ins_pipe( pipe_slow );
7612+
%}
7613+
75667614
instruct loadShuffleS_evex(vec dst, vec src) %{
75677615
predicate(vector_element_basic_type(n) == T_SHORT &&
75687616
VM_Version::supports_avx512bw());

src/jdk.incubator.vector/share/classes/jdk/incubator/vector/Byte128Vector.java

Lines changed: 3 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2017, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -387,14 +387,7 @@ public Byte128Vector slice(int origin, Vector<Byte> v) {
387387
@Override
388388
@ForceInline
389389
public Byte128Vector slice(int origin) {
390-
if ((origin < 0) || (origin >= VLENGTH)) {
391-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
392-
} else {
393-
Byte128Shuffle Iota = iotaShuffle();
394-
VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.LT, (broadcast((byte)(VLENGTH-origin))));
395-
Iota = iotaShuffle(origin, 1, true);
396-
return ZERO.blend(this.rearrange(Iota), BlendMask);
397-
}
390+
return (Byte128Vector) super.sliceTemplate(origin); // specialize
398391
}
399392

400393
@Override
@@ -415,14 +408,7 @@ public Byte128Vector unslice(int origin, Vector<Byte> w, int part, VectorMask<By
415408
@Override
416409
@ForceInline
417410
public Byte128Vector unslice(int origin) {
418-
if ((origin < 0) || (origin >= VLENGTH)) {
419-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
420-
} else {
421-
Byte128Shuffle Iota = iotaShuffle();
422-
VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.GE, (broadcast((byte)(origin))));
423-
Iota = iotaShuffle(-origin, 1, true);
424-
return ZERO.blend(this.rearrange(Iota), BlendMask);
425-
}
411+
return (Byte128Vector) super.unsliceTemplate(origin); // specialize
426412
}
427413

428414
@Override

src/jdk.incubator.vector/share/classes/jdk/incubator/vector/Byte256Vector.java

Lines changed: 3 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2017, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -387,14 +387,7 @@ public Byte256Vector slice(int origin, Vector<Byte> v) {
387387
@Override
388388
@ForceInline
389389
public Byte256Vector slice(int origin) {
390-
if ((origin < 0) || (origin >= VLENGTH)) {
391-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
392-
} else {
393-
Byte256Shuffle Iota = iotaShuffle();
394-
VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.LT, (broadcast((byte)(VLENGTH-origin))));
395-
Iota = iotaShuffle(origin, 1, true);
396-
return ZERO.blend(this.rearrange(Iota), BlendMask);
397-
}
390+
return (Byte256Vector) super.sliceTemplate(origin); // specialize
398391
}
399392

400393
@Override
@@ -415,14 +408,7 @@ public Byte256Vector unslice(int origin, Vector<Byte> w, int part, VectorMask<By
415408
@Override
416409
@ForceInline
417410
public Byte256Vector unslice(int origin) {
418-
if ((origin < 0) || (origin >= VLENGTH)) {
419-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
420-
} else {
421-
Byte256Shuffle Iota = iotaShuffle();
422-
VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.GE, (broadcast((byte)(origin))));
423-
Iota = iotaShuffle(-origin, 1, true);
424-
return ZERO.blend(this.rearrange(Iota), BlendMask);
425-
}
411+
return (Byte256Vector) super.unsliceTemplate(origin); // specialize
426412
}
427413

428414
@Override

src/jdk.incubator.vector/share/classes/jdk/incubator/vector/Byte512Vector.java

Lines changed: 3 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2017, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2017, 2021, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
@@ -387,14 +387,7 @@ public Byte512Vector slice(int origin, Vector<Byte> v) {
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@Override
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@ForceInline
389389
public Byte512Vector slice(int origin) {
390-
if ((origin < 0) || (origin >= VLENGTH)) {
391-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
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} else {
393-
Byte512Shuffle Iota = iotaShuffle();
394-
VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.LT, (broadcast((byte)(VLENGTH-origin))));
395-
Iota = iotaShuffle(origin, 1, true);
396-
return ZERO.blend(this.rearrange(Iota), BlendMask);
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}
390+
return (Byte512Vector) super.sliceTemplate(origin); // specialize
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}
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@Override
@@ -415,14 +408,7 @@ public Byte512Vector unslice(int origin, Vector<Byte> w, int part, VectorMask<By
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@Override
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@ForceInline
417410
public Byte512Vector unslice(int origin) {
418-
if ((origin < 0) || (origin >= VLENGTH)) {
419-
throw new ArrayIndexOutOfBoundsException("Index " + origin + " out of bounds for vector length " + VLENGTH);
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} else {
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Byte512Shuffle Iota = iotaShuffle();
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VectorMask<Byte> BlendMask = Iota.toVector().compare(VectorOperators.GE, (broadcast((byte)(origin))));
423-
Iota = iotaShuffle(-origin, 1, true);
424-
return ZERO.blend(this.rearrange(Iota), BlendMask);
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}
411+
return (Byte512Vector) super.unsliceTemplate(origin); // specialize
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}
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@Override

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