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    • 和我一步一步实现一个最简单的、带数据前推及流水线暂停的32位静态五级流水MIPS
      GNU General Public License v3.0
      138310Updated Nov 21, 2020Nov 21, 2020
    • A first-stage bootloader targeting RagdollSoC, MIPS32EL, used for board-level initializing and have an exception vector that catches magic error.
      C
      GNU General Public License v3.0
      0000Updated May 30, 2020May 30, 2020
    • Homepage
      CSS
      0000Updated Dec 20, 2019Dec 20, 2019
    • The web user interface to access the HypoSoC IoT Platfrom
      CSS
      GNU General Public License v3.0
      0000Updated Dec 6, 2019Dec 6, 2019
    • A tiny SoC made of Xilinx IP Cores and a few open-source modules by Loongson
      Verilog
      GNU General Public License v3.0
      1400Updated Aug 23, 2019Aug 23, 2019
    • The device modules of all connected devices
      GNU General Public License v3.0
      0000Updated Aug 18, 2019Aug 18, 2019
    • A customized kernel of Linux 2.6.32 used for Hypothetic IoT Platform
      C
      GNU General Public License v3.0
      0000Updated Aug 15, 2019Aug 15, 2019
    • A derived busybox build to make the initramfs in Hypo Linux
      C
      Other
      0000Updated Aug 15, 2019Aug 15, 2019
    • An embedded file system used for Hypothetic Linux IoT
      GNU General Public License v3.0
      0000Updated Aug 15, 2019Aug 15, 2019
    • cores

      Public
      Various HDL (Verilog) IP Cores
      Verilog
      215000Updated Jul 21, 2019Jul 21, 2019
    • The official Xilinx u-boot repository
      C
      788000Updated Jun 28, 2019Jun 28, 2019
    • The official Linux kernel from Xilinx
      C
      Other
      1.5k000Updated Jun 28, 2019Jun 28, 2019
    • Xilinx Embedded Software (embeddedsw) Development
      HTML
      Other
      1.1k000Updated Jun 14, 2019Jun 14, 2019