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@hlslibs HLSLibs

@kevinyuan
Kevin Yuan kevinyuan
@allpan3
Allen Pan allpan3
@fxckingshit
fxckingshit
@DeanSu948
DeanSu948
Penn State BSEE 2022; Digital IC Design Engineer in HiSilicon Balong From March 2023 to August 2024;
@DavideConficconi
Davide Conficconi DavideConficconi
Domain-Specific and Reconfigurable Systems, from microarchitecture to software abstractions. Assistant Prof. at Politecnico di Milano @necst

Politecnico di Milano Politecnico di Milano

@hailinzeng
Hailin, Zeng hailinzeng
Formal Verification

Beijing, China

@shanyinshuiyue
shanyinshuiyue
@ggkx
ggkx
@fennecfox38
Jun Gu Kang fennecfox38
MS, ECE, Inha Univ.

CASL @ Inha University Inchoen, South Korea

@yunchenlo
Yun-Chen Lo yunchenlo

National Tsing Hua University (NTHU) Boston, MA

@BenjaminQuiedeville
Benjamin Quiédeville BenjaminQuiedeville
PHD student on the Faust compiler in the Emeraude Team at INRIA/Grame. Graduated from ATIAM masters degree at IRCAM.

INRIA/Grame, Emeraude Team Lyon, France

@eusme
Esmael Mohammed eusme
Software Engineer , Co-Founder of Qualliaware Software S.C

Qualliaware Software SC Addis Ababa, Ethiopia

@swnh
Seungwan Noh swnh

Pusan National Universtiy Busan, Korea

@dzx-dzx
Andvari dzx-dzx
@InnovatorNZ IS JULAO!
@runningyong
runningyong
@RheinGold1999
RheinGold1999
@mohamed
Mohamed A. Bamakhrama mohamed

Renesas Electronics Corporation The Netherlands

@aki-tech-pro
aki-tech-pro
@Mohamedsabry109
Mohamed Sabry Mohamedsabry109
@lmarien94
lmarien94
ASIC/FPGA Engineer | Researcher @ KU Leuven.

KU Leuven Antwerpen

@zhuguiyuan
Guiyuan Zhu zhuguiyuan
A CS Student @ ShanghaiTech & ICT
@lexgolovchenko
Aleksey Golovchenko lexgolovchenko

St.Petersburg, Russia

@nuaaceieyty
nuaaceieyty
@yuchaoliao
Yuchao Liao yuchaoliao
@Kensei187
Kensei Kensei187
Le savoir, c'est le pouvoir. Francis Bacon
@wk1101
wk1101
@cslalexX
Alex Wang cslalexX

Earth

@learningHWSW
LJS learningHWSW
I am interested in Verilog, system verilog, C, C++, System C

PUSAN NATIONAL UNIVERSITY

@xz10620
Xiaodong Zhao xz10620
Talented Engineer looking for new way to build chips

zScale Computing California

@PavlosTzitzos
pavlos tzitzos PavlosTzitzos
Just an undergraduate electrical and computer engineer student.

Democritus University of Thrace Xanth GR

@mediagarden
mediagarden
@xiangxud
xiangxudong xiangxud
old programmer,like full stack c ,go ,js,java,study in all lifecycle
@liwei46
liwei46
@liyuan-guo
Liyuan von Rheinland liyuan-guo
@sosarkar
sosarkar

Munich, Germany

@kungkurt
kungkurt
@tcxxxx
TC Tiancheng Xu tcxxxx

Rice University Houston, TX

@shieldforever
Haomin Li shieldforever
I am Haomin Li. CS PhD candidate from Shanghai Jiao Tong University.

Shanghai Jiao Tong University Shanghai Jiao Tong University

@ngupta949
Nidhi Gupta ngupta949
Electronics Engineer (FPGA/ASIC)

Greensboro, NC

@Mahdi-abbasi1358
Mahdi Abbasi Mahdi-abbasi1358
Interested in Network Optimization, Network Automation, Optimization and Synthesis of Digital Systems, and Embedded Intelligence. Here, I put some codes&papers

Bu Ali Sina University

@fevredream
fevredream
@biteye
biteye
@lifoo
lifoo lifoo

hangzhou

@sigpro
Wayne sigpro
@infini8-13
Saaswath infini8-13
Creating stuff that makes and improves computers. 1/0.

IIT(BHU) Varanasi Chennai

@jaemyungkim
jaemyungkim
@eykeyke
eykeyke
@bufans
bufans
@dzzhan
dzzhan
@oceanremotesensing
sarocean oceanremotesensing