Precisely Synchronizing Low Rate SM to Async Edge - Arm Thumb help needed #16449
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here's the revised 'un-rolled' image of the code, and the code itself. This is getting close, but there is still an unknown timing bug. It's slightly off from the expected 83.3333 us. I am still looking for Arm Thumb help for: 1). Disable/Enable other IRQs interrupting my ISR. 3). How to do a 'vectored' jump into code, ie to jump over a (changable) number of |
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I released that with 'B' taking 2 cycles when 'taken', it means that there are actually 6 possible flows. I will need to adjust my scheme a bit... |
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Working away on my Timing/Clock projects, where i have a low-ish speed (12KHz clock) PIO StateMachine which I need/want to synchronize to a trigger edge... just triggering when the input goes high (or low) results in inaccurate timing, in that the delta between StateMachine clock and edge can be from zero to up-to one period.
I've worked out a good solution, but need some Arm Thumb help to optimize. It works like this....
This looks like this:
Code is:
precision.py.txt
Where I need some help is in the IRQ handler, which is in Thumb ASM.
1). To add code to enable/disable IRQs, so that that it is not interrupted by higher priority IRQ.
2). Increase the speed of testing for the '0' address of the medium speed SM. This is when the handler knows to enable the low speed SM. This really isn't fast enough, SM will spend 10 SYS_CLKs at this 'address' but I would like the trigger to be quicker.
3). BONUS FEATURE - if you look at the fast SM it has a 'trap' for detecting the relative phase of the 12MHz medium speed SM. If the IRQ handler can be speed-up, then it can use this information to finely adjust the moment when it enables the Slow SM.
Here's a quick plot, showing that (even as-is) the code is really good at starting the slow SM at the right point/time:
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