-
Notifications
You must be signed in to change notification settings - Fork 3
/
Copy pathax99100_sp.c
3125 lines (2628 loc) · 97.1 KB
/
ax99100_sp.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* linux/drivers/serial/99100.c
*
* Based on drivers/serial/8250.c by Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This code is modified to support AX99100 series serial devices
*/
#include <linux/version.h>
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15)
#include <linux/config.h>
#endif
#if defined(CONFIG_SERIAL_99xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
#include <linux/mca.h>
#endif
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_reg.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/nmi.h>
#include <linux/bitops.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include "ax99100_sp.h"
#include "ax99100_spi.h"
#include <linux/ioctl.h>
#include "ioctl.h"
#define UART99100_NR 16
static char version[] =
KERN_INFO "ASIX AX99100 PCIe Bridg to Serial Port:v" DRV_VERSION
// " " __TIME__ " " __DATE__ "\n"
" http://www.asix.com.tw\n";
//All transactions are with memory mapped registers
#define MEM_AXS 1
/*
* Definitions for PCI support.
*/
#define FL_BASE_MASK 0x0007
#define FL_BASE0 0x0000
#define FL_BASE1 0x0001
#define FL_BASE2 0x0002
#define FL_BASE3 0x0003
#define FL_BASE4 0x0004
#define FL_BASE5 0x0005
#define FL_GET_BASE(x) (x & FL_BASE_MASK)
#if 0
#define DEBUG(fmt...) printk(KERN_ERR fmt)
#else
#define DEBUG(fmt...) do { } while (0)
#endif
#if 0
#define MP_DBG(fmt...) printk(KERN_ERR fmt)
#else
#define MP_DBG(fmt...) do { } while (0)
#endif
#if 0
#define TR_DBG(fmt...) printk(KERN_ERR fmt)
#else
#define TR_DBG(fmt...) do { } while (0)
#endif
#if 0
#define BR_DBG(fmt...) printk(KERN_ERR fmt)
#else
#define BR_DBG(fmt...) do { } while (0)
#endif
#if 0
#define INIT_DBG(fmt...) printk(KERN_ERR fmt)
#else
#define INIT_DBG(fmt...) do { } while (0)
#endif
#if 0
#define RXDMA_DBG(fmt...) if ( up->function_number == 0 ) printk(KERN_ERR fmt)
#else
#define RXDMA_DBG(fmt...) do { } while (0)
#endif
#if 0
#define INT_DBG(fmt...) printk(fmt)
#else
#define INT_DBG(fmt...) do { } while (0)
#endif
#if 0
#define DMA_DEBUG(fmt...) if ( up->function_number == 0 ) printk(KERN_ERR fmt)
#else
#define DMA_DEBUG(fmt...) do { } while (0)
#endif
#if 0
#define DMATX_DEBUG(fmt...) if ( up->function_number == 3 ) printk(KERN_ERR fmt)
#else
#define DMATX_DEBUG(fmt...) do { } while (0)
#endif
#if 0
#define TX_DEBUG(fmt...) if ( up->function_number == 3 ) printk(KERN_ERR fmt)
#else
#define TX_DEBUG(fmt...) do { } while (0)
#endif
#if 0
#define TFC_DEBUG(fmt...) printk(KERN_ERR fmt)
#else
#define TFC_DEBUG(fmt...) do { } while (0)
#endif
#if 0
#define D_T_DEBUG(fmt...) printk(KERN_ERR fmt)
#else
#define D_T_DEBUG(fmt...) do { } while (0)
#endif
int gpio_mode = 3; //4 serial port mode
int suspend_count = 0;
int dma_rx_count = 0;
struct custom_eeprom CusEEbuffer;
/* ASUS setting */
unsigned long TtempValue = 0;
unsigned long GpioSetValueGroup0 = 0;
unsigned long GpioSetValueGroup1 = 0;
unsigned long GpioSetValueGroup2 = 0;
unsigned long GpioSetValueGroup3 = 0;
unsigned long SetGpioValue = 0;
struct uart_99100_port {
struct uart_port port;
spinlock_t lock_99100; //Per port lock
int serialise_txdma; //Variable to serialise the start_tx calls in dma mode
unsigned int dma_tx; //TX DMA enable or not
unsigned int dma_rx; //RX DMA enable or not
u8 ier; //Interrupt Enable Register
u8 lcr; //Line Control Register
u8 mcr; //Modem Control Register
u8 acr; //Additional Control Register
u8 fcr; //FIFO Control Register
int gier; //Global Interrupt Enable Register
unsigned int capabilities; //port capabilities
int rxfifotrigger;
int txfifotrigger;
u32 dma_tx_cnt; //Amount of data to be DMA in TX
u32 dma_rx_cnt; //Amount of data to be DMA in RX
int first_tx_dma;
int pre_need2recv_cnt;
char * dma_tx_buf_v; //Virtual Address of DMA Buffer for TX
dma_addr_t dma_tx_buf_p; //Physical Address of DMA Buffer for TX
char * dma_tx_buf_v_start; //Virtual Address of DMA Buffer for Strat TX
dma_addr_t dma_tx_buf_p_start; //Physical Address of DMA Buffer for Start TX
char * dma_rx_buf_v; //Virtual Address of DMA Buffer for RX
dma_addr_t dma_rx_buf_p; //Physical Address of DMA Buffer for TX
u32 part_done_recv_cnt; //RX DMA CIRC buffer Read index
int rx_dma_done_cnt;
int uart_mode; //SERIAL TYPE
int flow_control; //Flow control is enabled or not
int flow_ctrl_type; //Type of Flow control
u8 x_on; //X-ON Character
u8 x_off; //X-OFF Character
u32 ser_dcr_din_reg; //Device control register
u32 ser_ven_reg; //Vendor register
struct uart_99100_port *next_port;
struct uart_99100_port *prev_port;
int dma_start_offset;
int custom_setting; //Custom application setup
int custom_baud;
int baud_base_clock;
int custom_dlm;
int custom_dll;
int custom_sampling_clock;
int function_number; //PCI function number
unsigned char __iomem *bar5membase; //BAR5 memory resource address
int ax99100_port_mode; //AX99100_SERIAL_PORT
//AX99100_MF_PORT
int ltc2872_te485; //LTC2872 Transceiver Setup
int ltc2872_dz;
int ltc2872_lb;
int ltc2872_fen;
u32 dma_delay_timeout;
u32 boundary_check;
u32 old_spssr2;
struct tasklet_struct tasklet_dma_rx;
struct tasklet_struct tasklet_dma_tx;
int k_gir; /* used in rx_kevent */
u8 k_lsr;
/* ASUS's application */
u8 oriDTR;
u8 oriCTS;
};
static struct uart_99100_port serial99100_ports[UART99100_NR];
static int nr_funs = 4;
struct uart_99100_contxt {
int rx_dma_en;
//0 -I/O mode of RX
//1 -DMA mode of RX
int tx_dma_en;
//0 -I/O mode of TX
//1 -DMA mode of TX
int uart_mode;
//AX99100_RS232_MODE
//AX99100_RS422_MODE
//AX99100_RS485_HALF_DUPLEX
//AX99100_RS485_HALF_DUPLEX_ECHO
//AX99100_RS485_FULL_DUPLEX
//AX99100_RS485_FULL_DUPLEX_TXEN
int en_flow_control;
//0 -No H/W Flow Control
//1 -H/W Flow Control
int flow_ctrl_type;
//AX99100_DTR_DSR_HW_FLOWCONTROL
//AX99100_XON_XOFF_HW_FLOWCONTROL
//AX99100_RTS_CTS_HW_FLOWCONTROL
int rxfifotrigger; //0-127
int txfifotrigger; //0-127
int x_on;
int x_off;
/* 2872 parameters */
int ltc2872_te485; //0 -open
//1 -enable 120Ohm TX termination
int ltc2872_dz; //0 -open
//1 -enable 120Ohm RX termination
int ltc2872_lb; //0 -disable loopback
//1 -enable loopback
int ltc2872_fen; //0 -disable fast mode
//1 -enable fast mode
/* PCIE ASPM parameters */
int pci_config_l0s; //0 -disable L0s HW power saving
//1 -enable L0s HW power saving
int pci_config_l1; //0 -disable L1 ASPM HW power saving
//1 -enable L1 ASPM HW power saving
};
static struct uart_99100_contxt uart_99100_contxts[] = {
//Port 0
{
.rx_dma_en = 1,
.tx_dma_en = 1,
.uart_mode = AX99100_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = AX99100_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on = SERIAL_DEF_XON,
.x_off = SERIAL_DEF_XOFF,
.ltc2872_te485 = 0,
.ltc2872_dz = 0,
.ltc2872_lb = 0,
.ltc2872_fen = 0,
.pci_config_l0s = 0,
.pci_config_l1 = 0,
},
//Port 1
{
.rx_dma_en = 1,
.tx_dma_en = 1,
.uart_mode = AX99100_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = AX99100_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on = SERIAL_DEF_XON,
.x_off = SERIAL_DEF_XOFF,
.ltc2872_te485 = 0,
.ltc2872_dz = 0,
.ltc2872_lb = 0,
.ltc2872_fen = 0,
.pci_config_l0s = 0,
.pci_config_l1 = 0,
},
//Port 2
{
.rx_dma_en = 1,
.tx_dma_en = 1,
.uart_mode = AX99100_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = AX99100_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on = SERIAL_DEF_XON,
.x_off = SERIAL_DEF_XOFF,
.ltc2872_te485 = 0,
.ltc2872_dz = 0,
.ltc2872_lb = 0,
.ltc2872_fen = 0,
.pci_config_l0s = 0,
.pci_config_l1 = 0,
},
//Port 3
{
.rx_dma_en = 1,
.tx_dma_en = 1,
.uart_mode = AX99100_RS232_MODE,
.en_flow_control= 0,
.flow_ctrl_type = AX99100_RTS_CTS_HW_FLOWCONTROL,
.rxfifotrigger = 64,
.txfifotrigger = 64,
.x_on = SERIAL_DEF_XON,
.x_off = SERIAL_DEF_XOFF,
.ltc2872_te485 = 0,
.ltc2872_dz = 0,
.ltc2872_lb = 0,
.ltc2872_fen = 0,
.pci_config_l0s = 0,
.pci_config_l1 = 0,
},
};
/*
* Here we define the default xmit fifo size used for each type of UART.
*/
static const struct serial99100_config uart_config[] = {
[PORT_UNKNOWN] = {
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16450] = {
.fifo_size = 1,
.tx_loadsz = 1,
},
[PORT_16550] = {
.fifo_size = 16,
.tx_loadsz = 14,
},
[PORT_16550A] = {
.fifo_size = 256,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
.flags = UART_CAP_FIFO,
},
[PORT_16650] = {
.fifo_size = 128,
.tx_loadsz = 128,
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_16750] = {
.fifo_size = 64,
.tx_loadsz = 64,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |UART_FCR7_64BYTE,
.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
},
[PORT_16850] = {
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO,
.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
},
[PORT_16C950] = {
.fifo_size = 128,
.tx_loadsz = 128,
.fcr = UART_FCR_ENABLE_FIFO,
.flags = UART_CAP_FIFO,
},
[PORT_ENHANCED]= {
.fifo_size = 256,
.tx_loadsz = 256,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
.flags = UART_CAP_FIFO,
},
};
//helper function for IO type read
static _INLINE_ u8 serial_in(struct uart_99100_port *up, int offset)
{
#if MEM_AXS
u8 tmp1;
tmp1=readl(up->port.membase+0x280+(offset*4));
return tmp1;
#else
return inb(up->port.iobase + offset);
#endif
}
//helper function for IO type write
static _INLINE_ void serial_out(struct uart_99100_port *up, int offset, int value)
{
#if MEM_AXS
writel(value, up->port.membase+0x280+(offset*4));
#else
outb(value, up->port.iobase + offset);
#endif
}
//Helper function to write to index control register
static void serial_icr_write(struct uart_99100_port *up, int offset, int value)
{
DEBUG("UART_LCR=0x%x\n",serial_in(up,UART_LCR));
serial_out(up, UART_SCR, offset);
serial_out(up, UART_ICR, value);
serial_out(up, UART_SCR, 0x00);
}
//Helper function to read from index control register
static unsigned int serial_icr_read(struct uart_99100_port *up, int offset)
{
unsigned int value;
serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
serial_out(up, UART_SCR, offset);
value = inb(up->port.iobase+UART_ICR);
serial_icr_write(up, UART_ACR, up->acr);
return value;
}
//Helper function to set the 950 mode
void setserial_ENHANC_mode(struct uart_99100_port *up)
{
u8 lcr,efr;
DEBUG("In %s---------------------------------------START\n",__FUNCTION__);
lcr=serial_in(up,UART_LCR);
serial_out(up, UART_LCR, 0xBF);
efr=serial_in(up,UART_EFR);
efr |= UART_EFR_ECB;
serial_out(up, UART_EFR,efr);
serial_out(up, UART_LCR, lcr);
DEBUG("In %s---------------------------------------END\n",__FUNCTION__);
}
// Helper function to clear the FIFO
static inline void serial99100_clear_fifos(struct uart_99100_port *p)
{
if (p->capabilities & UART_CAP_FIFO) {
serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
serial_out(p, UART_FCR, 0);
}
}
//Helper function to set the the UART to sleep mode
static inline void serial99100_set_sleep(struct uart_99100_port *p, int sleep)
{
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
if (p->capabilities & UART_CAP_SLEEP) {
if (p->capabilities & UART_CAP_EFR) {
serial_out(p, UART_LCR, 0xBF);
serial_out(p, UART_EFR, UART_EFR_ECB);
serial_out(p, UART_LCR, 0);
}
serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
if (p->capabilities & UART_CAP_EFR) {
serial_out(p, UART_LCR, 0xBF);
serial_out(p, UART_EFR, 0);
serial_out(p, UART_LCR, 0);
}
}
DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
}
//Member function of the port operations to stop the data transfer
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
static void serial99100_stop_tx(struct uart_port *port, unsigned int tty_stop)
#else
static void serial99100_stop_tx(struct uart_port *port)
#endif
{
struct uart_99100_port *up = &serial99100_ports[port->line];
u32 value=0;
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
if(up->dma_tx){
up->serialise_txdma=0;
value |= TX_DMA_STOP_BIT;
writel(value, up->port.membase + REG_TX_DMA_STOP);
}else{ //IO mode
if (up->ier & UART_IER_THRI) {
up->ier &= ~UART_IER_THRI;
serial_out(up, UART_IER, up->ier);
}
}
DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
}
//Member function of the port operations to start the data transfer
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
static void serial99100_start_tx(struct uart_port *port, unsigned int tty_start)
#else
static void serial99100_start_tx(struct uart_port *port)
#endif
{
struct uart_99100_port *up = &serial99100_ports[port->line];
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct circ_buf *xmit = &up->port.info->xmit;
#else
struct circ_buf *xmit = &up->port.state->xmit;
#endif
u32 length=0,len2end,txdma_status=0;
int tail,head,tobe_transferred;
unsigned long flags;
D_T_DEBUG("In %s ---------0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
TX_DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
if (up->first_tx_dma == 1) {
txdma_status = 1;
up->first_tx_dma = 0;
} else
txdma_status = readl(up->port.membase+REG_TX_DMA_STATUS);
D_T_DEBUG("In %s ---------0x%x\n",__FUNCTION__,txdma_status);
tobe_transferred=readl(up->port.membase+REG_TX_BYTES_TRANSFERRED);
DMATX_DEBUG("In %s -------------tobe_transferred=%d--------------------------START\n",__FUNCTION__,tobe_transferred);
if(up->dma_tx && ((txdma_status & 0x01) == 1) && up->serialise_txdma == 0){
TX_DEBUG(" I WAS IN DMA OF START_TX\n");
//CALCULATING THE AMOUNT OF DATA AVAILABLE FOR THE NEXT TRANSFER
//AND COPYING THE DATA TO THE DMA BUFFER
length = uart_circ_chars_pending(xmit);
if (length == 0) {
TX_DEBUG("In %s TX length = 0\n",__FUNCTION__);
return;
}
head=xmit->head;
tail=xmit->tail;
len2end = CIRC_CNT_TO_END(head, tail, UART_XMIT_SIZE); //size 4096
TX_DEBUG("In %s -------------------xmit->tail=%d, xmit->head=%d,length=%d,length2end=%d\n",__FUNCTION__,tail,head,length,len2end);
if(tail < head){
if(length <= DMA_TX_BUFFER_SZ){
TX_DEBUG("In %s normal circ buffer\n",__FUNCTION__);
memcpy(up->dma_tx_buf_v_start,&xmit->buf[tail],length); //xmit->buf + xmit->tail
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = length;
}else{
memcpy(up->dma_tx_buf_v_start,&xmit->buf[tail],DMA_TX_BUFFER_SZ);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = DMA_TX_BUFFER_SZ;
}
}else{
if(length <= DMA_TX_BUFFER_SZ){
TX_DEBUG("In %s 2 mode circ buffer\n",__FUNCTION__);
memcpy(up->dma_tx_buf_v_start, &xmit->buf[tail], len2end);
memcpy(up->dma_tx_buf_v_start+len2end, xmit->buf, head);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = length;
}else{
if(len2end <= DMA_TX_BUFFER_SZ){
memcpy(up->dma_tx_buf_v_start,&xmit->buf[tail],len2end);
memcpy(up->dma_tx_buf_v_start+len2end, xmit->buf, DMA_TX_BUFFER_SZ-len2end);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = len2end;
}else{
memcpy(up->dma_tx_buf_v_start,&xmit->buf[tail],DMA_TX_BUFFER_SZ);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = DMA_TX_BUFFER_SZ;
}
}
}
DMATX_DEBUG("In %s -------------xmit->tail=%d--------------------------START\n",__FUNCTION__,xmit->tail);
xmit->tail = ((xmit->tail) + up->dma_tx_cnt) & (UART_XMIT_SIZE-1);
DMATX_DEBUG("In %s -------------xmit->tail2=%d--------------------------START\n",__FUNCTION__,xmit->tail);
up->serialise_txdma++;
spin_lock_irqsave(&up->lock_99100, flags);
//variable to serialise the DMA tx calls
writel(up->dma_tx_buf_p_start,up->port.membase + REG_TX_DMA_START_ADDRESS_LOW);
writel(up->dma_tx_cnt,up->port.membase+REG_TX_DMA_LENGTH);
writel(TX_DMA_START_BIT, up->port.membase + REG_TX_DMA_START);
spin_unlock_irqrestore(&up->lock_99100, flags);
TX_DEBUG("In %s programmed registers\n",__FUNCTION__);
//UPDATING THE xmit FIFO WITH THE AMOUNT OF DATA TRANSFERRED
txdma_status=0;
}else{
if (!(up->ier & UART_IER_THRI)) {
up->ier |= UART_IER_THRI;
serial_out(up, UART_IER, up->ier);
}
}
TX_DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
}
//Member function of the port operations to stop receiving the data
static void serial99100_stop_rx(struct uart_port *port)
{
struct uart_99100_port *up = &serial99100_ports[port->line];
//u32 value=0;
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
if(up->dma_rx){
//value |= RX_DMA_STOP_BIT;
//writel(value, up->port.membase + REG_RX_DMA_STOP);
}else{
up->ier &= ~UART_IER_RLSI;
up->port.read_status_mask &= ~UART_LSR_DR;
serial_out(up, UART_IER, up->ier);
}
DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
}
//Member function of the port operations to enable modem status change interrupt
static void serial99100_enable_ms(struct uart_port *port)
{
struct uart_99100_port *up = &serial99100_ports[port->line];
DEBUG("In %s --------------------------------------- START\n",__FUNCTION__);
up->ier |= UART_IER_MSI;
serial_out(up, UART_IER, up->ier);
}
//Function to check modem statuss
static _INLINE_ void check_modem_status(struct uart_99100_port *up)
{
u8 status;
DEBUG("In %s -------------------- START\n",__FUNCTION__);
status = serial_in(up, UART_MSR);
if ((status & UART_MSR_ANY_DELTA) == 0)
return;
if (status & UART_MSR_TERI)
up->port.icount.rng++;
if (status & UART_MSR_DDSR)
up->port.icount.dsr++;
if (status & UART_MSR_DDCD)
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCTS)
uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
wake_up_interruptible(&up->port.info->delta_msr_wait);
#else
wake_up_interruptible(&up->port.state->port.delta_msr_wait);
#endif
DEBUG("In %s -------------------- END\n",__FUNCTION__);
}
//Helper function used in ISR to receive the charecters from the UART
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
static _INLINE_ void receive_chars(struct uart_99100_port *up, u8 *status)
#else
static _INLINE_ void receive_chars(struct uart_99100_port *up, u8 *status, struct pt_regs *regs)
#endif
{
#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
struct tty_struct *tty = up->port.info->tty;
#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct tty_struct *tty = up->port.info->port.tty;
#else
struct tty_struct *tty = up->port.state->port.tty;
#endif
u8 ch,lsr = *status;
int max_count = 256;
unsigned int flag;
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
do {
/* The following is not allowed by the tty layer and
unsafe. It should be fixed ASAP */
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15)
if (unlikely(tty->flip.count >= TTY_FLIPBprintk("addr 0x%x\n",readl(up->port.membase + REG_TX_DMA_START_ADDRESS_LOW));UF_SIZE)) {
if (tty->low_latency) {
spin_unlock(&up->port.lock);
tty_flip_buffer_push(tty);
spin_lock(&up->port.lock);
}
/*
* If this failed then we will throw away the
* bytes but must do so to clear interrupts
*/
}
#endif
ch = serial_in(up, UART_RX);
flag = TTY_NORMAL;
up->port.icount.rx++;
if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |UART_LSR_FE | UART_LSR_OE))) {
/*
* For statistics only
*/
if (lsr & UART_LSR_BI) {
lsr &= ~(UART_LSR_FE | UART_LSR_PE);
up->port.icount.brk++;
/*
* We do the SysRQ and SAK checking
* here because otherwise the break
* may get masked by ignore_status_mask
* or read_status_mask.
*/
if (uart_handle_break(&up->port))
goto ignore_char;
} else if (lsr & UART_LSR_PE)
up->port.icount.parity++;
else if (lsr & UART_LSR_FE)
up->port.icount.frame++;
if (lsr & UART_LSR_OE)
up->port.icount.overrun++;
/*
* Mask off conditions which should be ignored.
*/
lsr &= up->port.read_status_mask;
if (lsr & UART_LSR_BI) {
DEBUG("handling break....");
flag = TTY_BREAK;
}else if (lsr & UART_LSR_PE)
flag = TTY_PARITY;
else if (lsr & UART_LSR_FE)
flag = TTY_FRAME;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
if (uart_handle_sysrq_char(&up->port, ch, regs))
goto ignore_char;
#else
if (uart_handle_sysrq_char(&up->port, ch))
goto ignore_char;
#endif
uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
ignore_char:
lsr = serial_in(up, UART_LSR);
} while ((lsr & UART_LSR_DR) && (max_count-- > 0));
spin_unlock(&up->port.lock);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,9,0)
tty_flip_buffer_push(tty->port);
#else
tty_flip_buffer_push(tty);
#endif
spin_lock(&up->port.lock);
*status = lsr;
DEBUG("In %s -------------------------------------END\n",__FUNCTION__);
}
//Helper function used in ISR to send the data to the UART
static _INLINE_ void transmit_chars(struct uart_99100_port *up)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct circ_buf *xmit = &up->port.info->xmit;
#else
struct circ_buf *xmit = &up->port.state->xmit;
#endif
int count;
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
if (up->port.x_char) {
serial_out(up, UART_TX, up->port.x_char);
up->port.icount.tx++;
up->port.x_char = 0;
return;
}
if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
serial99100_stop_tx(&up->port, 0);
#else
serial99100_stop_tx(&up->port);
#endif
return;
}
count = uart_config[up->port.type].tx_loadsz;
DEBUG("In %s-----------up->port.type=%d,tx_loadsz=%d\n",__FUNCTION__,up->port.type,count);
do {
serial_out(up, UART_TX, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
up->port.icount.tx++;
if (uart_circ_empty(xmit))
break;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&up->port);
if (uart_circ_empty(xmit)){
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,13)
serial99100_stop_tx(&up->port, 0);
#else
serial99100_stop_tx(&up->port);
#endif
}
DEBUG("In %s --------------------------------------2END\n",__FUNCTION__);
}
//Helper function to stop the characters transmission in DMA mode
/*
static void transmit_chars_dma_stop_done(struct uart_99100_port * up)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct circ_buf *xmit = &up->port.info->xmit;
#else
struct circ_buf *xmit = &up->port.state->xmit;
#endif
long int transferred;
DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
//UPDATING THE TRANSMIT FIFO WITH THE AMOUNT OF DATA TRANSFERRED
transferred=readl(up->port.membase+REG_TX_BYTES_TRANSFERRED);
xmit->tail=((xmit->tail)+transferred) & (UART_XMIT_SIZE-1);
up->port.icount.tx += transferred;
up->serialise_txdma=0;
memset(up->dma_tx_buf_v,0,DMA_TX_BUFFER_SZ);
DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
}
*/
//Helper function to do the necessary action upon the successful completion of data transfer in DMA mode
static int transmit_chars_dma_done(struct uart_99100_port * up)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct circ_buf *xmit = &up->port.info->xmit;
#else
struct circ_buf *xmit = &up->port.state->xmit;
#endif
int length,len2end;
D_T_DEBUG("In %s ---------0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
DMATX_DEBUG("In %s ---------------------------------------START\n",__FUNCTION__);
up->port.icount.tx += up->dma_tx_cnt;
length = uart_circ_chars_pending(xmit);
DMATX_DEBUG("In %s circ_buf lenght=%d after\n",__FUNCTION__,length);
DMATX_DEBUG("In %s up->dma_tx_buf_v=0x%x ---------------------------------------\n",__FUNCTION__,(unsigned int)up->dma_tx_buf_v);
if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)){
up->serialise_txdma=0;
if (length < WAKEUP_CHARS)
uart_write_wakeup(&up->port);
return 0;
}
//CALCULATING THE AMOUNT OF DATA AVAILABLE FOR THE NEXT TRANSFER
//AND COPYING THE DATA TO THE DMA BUFFER
length = uart_circ_chars_pending(xmit);
len2end = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
DMATX_DEBUG("In %s -------xmit->tail=%d, xmit->head=%d,length=%d,length2end=%d\n",__FUNCTION__,xmit->tail,xmit->head,length,len2end);
if(xmit->tail < xmit->head){
if(length <= DMA_TX_BUFFER_SZ){
memcpy(up->dma_tx_buf_v,&xmit->buf[xmit->tail],length); //xmit->buf + xmit->tail
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = length;
DMATX_DEBUG("In %s Normal mode\n",__FUNCTION__);
}else{
memcpy(up->dma_tx_buf_v,&xmit->buf[xmit->tail],DMA_TX_BUFFER_SZ);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = DMA_TX_BUFFER_SZ;
}
}else{
if(length <= DMA_TX_BUFFER_SZ){
DMATX_DEBUG("In %s 2nd mode\n",__FUNCTION__);
memcpy(up->dma_tx_buf_v,&xmit->buf[xmit->tail],len2end);
memcpy(up->dma_tx_buf_v+len2end,xmit->buf,xmit->head);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = length;
}else{
if(len2end <= DMA_TX_BUFFER_SZ){
memcpy(up->dma_tx_buf_v,&xmit->buf[xmit->tail],len2end);
memcpy(up->dma_tx_buf_v+len2end, xmit->buf, DMA_TX_BUFFER_SZ-len2end);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = len2end;
}else{
memcpy(up->dma_tx_buf_v,&xmit->buf[xmit->tail],DMA_TX_BUFFER_SZ);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->dma_tx_cnt = DMA_TX_BUFFER_SZ;
}
}
}
//UPDATING THE xmit FIFO WITH THE AMOUNT OF DATA TRANSFERRED
DMATX_DEBUG("In %s -------------xmit->tail=%d--------------------------START\n",__FUNCTION__,xmit->tail);
xmit->tail = ((xmit->tail) + up->dma_tx_cnt) & (UART_XMIT_SIZE-1);
DMATX_DEBUG("In %s -------------xmit->tail2=%d--------------------------START\n",__FUNCTION__,xmit->tail);
DMATX_DEBUG("In %s length=%d\n",__FUNCTION__,length);
//INITIATING THE NEXT TRANSFER
writel(up->dma_tx_buf_p,up->port.membase + REG_TX_DMA_START_ADDRESS_LOW);
//Writing the length of data to the TX DMA Length register
writel(up->dma_tx_cnt,up->port.membase+REG_TX_DMA_LENGTH);
//Start the DMA data transfer
writel(TX_DMA_START_BIT,up->port.membase+REG_TX_DMA_START);
D_T_DEBUG("In %s ---1-----0x%x\n",__FUNCTION__,readl(up->port.membase+REG_TX_DMA_STATUS));
up->serialise_txdma=0;
// Requesting more data to send out from the TTY layer to the driver
if (length < WAKEUP_CHARS)
uart_write_wakeup(&up->port);
DMATX_DEBUG("In %s ---------------------------------------END\n",__FUNCTION__);
return 0;
}
//Helper function to do the necessary action upon the successful completion of data receive in DMA mode
static void receive_chars_dma_done(struct uart_99100_port * up, int iirg)
{
#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
struct tty_struct *tty = up->port.info->tty;
#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
struct tty_struct *tty = up->port.info->port.tty;
#else
struct tty_struct *tty = up->port.state->port.tty;
#endif
int i;
u32 received_bytes;
u32 need2recv,temp_spssr2=0;
up->k_lsr = serial_in(up, UART_LSR);
RXDMA_DBG("In %s ---------iirg=0x%x------------------------------START\n",__FUNCTION__,iirg);
//checking for the flip buffer size and asking to clear it upon some threshold
#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,15)
if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
if (tty->low_latency) {
spin_unlock(&up->port.lock);
tty_flip_buffer_push(tty);
spin_lock(&up->port.lock);
}
}
#endif
need2recv=readl(up->port.membase + REG_RX_BYTES_NEED_TO_RECV);
RXDMA_DBG("In %s --------Receive DMA Part Done need2recv=%d\n",__FUNCTION__,need2recv);
RXDMA_DBG("In %s --------pre_need2recv_cnt=%d\n",__FUNCTION__,up->pre_need2recv_cnt);
if ( need2recv == 0 && up->pre_need2recv_cnt == 0) {